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Move target-* CPU file into a target/ folder

Browse source 
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part]
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part]
Acked-by: Michael Walle <michael@walle.cc> [lm32 part]
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part]
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part]
Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part]
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part]
Acked-by: Richard Henderson <rth@twiddle.net> [alpha part]
Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part]
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part]
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part]
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part]
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Thomas Huth 2016-10-11 08:56:52 +02:00
parent 82ecffa8c0
commit fcf5ef2ab5
369 changed files with 78 additions and 80 deletions
Download patch file Download diff file Expand all files Collapse all files

3
target/m68k/Makefile.objs Normal file
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obj-y += m68k-semi.o
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += gdbstub.o

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/*
* QEMU Motorola 68k CPU
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
#ifndef QEMU_M68K_CPU_QOM_H
#define QEMU_M68K_CPU_QOM_H
#include "qom/cpu.h"
#define TYPE_M68K_CPU "m68k-cpu"
#define M68K_CPU_CLASS(klass) \
OBJECT_CLASS_CHECK(M68kCPUClass, (klass), TYPE_M68K_CPU)
#define M68K_CPU(obj) \
OBJECT_CHECK(M68kCPU, (obj), TYPE_M68K_CPU)
#define M68K_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(M68kCPUClass, (obj), TYPE_M68K_CPU)
/**
* M68kCPUClass:
* @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
*
* A Motorola 68k CPU model.
*/
typedef struct M68kCPUClass {
/*< private >*/
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
} M68kCPUClass;
typedef struct M68kCPU M68kCPU;
#endif

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/*
* QEMU Motorola 68k CPU
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see
* <http://www.gnu.org/licenses/lgpl-2.1.html>
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
#include "qemu-common.h"
#include "migration/vmstate.h"
#include "exec/exec-all.h"
static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
{
M68kCPU *cpu = M68K_CPU(cs);
cpu->env.pc = value;
}
static bool m68k_cpu_has_work(CPUState *cs)
{
return cs->interrupt_request & CPU_INTERRUPT_HARD;
}
static void m68k_set_feature(CPUM68KState *env, int feature)
{
env->features |= (1u << feature);
}
/* CPUClass::reset() */
static void m68k_cpu_reset(CPUState *s)
{
M68kCPU *cpu = M68K_CPU(s);
M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
CPUM68KState *env = &cpu->env;
mcc->parent_reset(s);
memset(env, 0, offsetof(CPUM68KState, features));
#if !defined(CONFIG_USER_ONLY)
env->sr = 0x2700;
#endif
m68k_switch_sp(env);
/* ??? FP regs should be initialized to NaN. */
cpu_m68k_set_ccr(env, 0);
/* TODO: We should set PC from the interrupt vector. */
env->pc = 0;
tlb_flush(s, 1);
}
static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
M68kCPU *cpu = M68K_CPU(s);
CPUM68KState *env = &cpu->env;
info->print_insn = print_insn_m68k;
if (m68k_feature(env, M68K_FEATURE_M68000)) {
info->mach = bfd_mach_m68040;
}
}
/* CPU models */
static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
char *typename;
if (cpu_model == NULL) {
return NULL;
}
typename = g_strdup_printf("%s-" TYPE_M68K_CPU, cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
object_class_is_abstract(oc))) {
return NULL;
}
return oc;
}
static void m5206_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
}
static void m68000_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_M68000);
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
}
static void m68020_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_M68000);
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_BCCL);
m68k_set_feature(env, M68K_FEATURE_BITFIELD);
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
m68k_set_feature(env, M68K_FEATURE_FPU);
m68k_set_feature(env, M68K_FEATURE_CAS);
m68k_set_feature(env, M68K_FEATURE_BKPT);
}
#define m68030_cpu_initfn m68020_cpu_initfn
#define m68040_cpu_initfn m68020_cpu_initfn
static void m68060_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_M68000);
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_BCCL);
m68k_set_feature(env, M68K_FEATURE_BITFIELD);
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
m68k_set_feature(env, M68K_FEATURE_FPU);
m68k_set_feature(env, M68K_FEATURE_CAS);
m68k_set_feature(env, M68K_FEATURE_BKPT);
}
static void m5208_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_USP);
}
static void cfv4e_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_USP);
}
static void any_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
CPUM68KState *env = &cpu->env;
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
/* MAC and EMAC are mututally exclusive, so pick EMAC.
It's mostly backwards compatible. */
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
}
typedef struct M68kCPUInfo {
const char *name;
void (*instance_init)(Object *obj);
} M68kCPUInfo;
static const M68kCPUInfo m68k_cpus[] = {
{ .name = "m68000", .instance_init = m68000_cpu_initfn },
{ .name = "m68020", .instance_init = m68020_cpu_initfn },
{ .name = "m68030", .instance_init = m68030_cpu_initfn },
{ .name = "m68040", .instance_init = m68040_cpu_initfn },
{ .name = "m68060", .instance_init = m68060_cpu_initfn },
{ .name = "m5206", .instance_init = m5206_cpu_initfn },
{ .name = "m5208", .instance_init = m5208_cpu_initfn },
{ .name = "cfv4e", .instance_init = cfv4e_cpu_initfn },
{ .name = "any", .instance_init = any_cpu_initfn },
};
static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
M68kCPU *cpu = M68K_CPU(dev);
M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
Error *local_err = NULL;
cpu_exec_realizefn(cs, &local_err);
if (local_err != NULL) {
error_propagate(errp, local_err);
return;
}
m68k_cpu_init_gdb(cpu);
cpu_reset(cs);
qemu_init_vcpu(cs);
mcc->parent_realize(dev, errp);
}
static void m68k_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
M68kCPU *cpu = M68K_CPU(obj);
CPUM68KState *env = &cpu->env;
static bool inited;
cs->env_ptr = env;
if (tcg_enabled() && !inited) {
inited = true;
m68k_tcg_init();
}
}
static const VMStateDescription vmstate_m68k_cpu = {
.name = "cpu",
.unmigratable = 1,
};
static void m68k_cpu_class_init(ObjectClass *c, void *data)
{
M68kCPUClass *mcc = M68K_CPU_CLASS(c);
CPUClass *cc = CPU_CLASS(c);
DeviceClass *dc = DEVICE_CLASS(c);
mcc->parent_realize = dc->realize;
dc->realize = m68k_cpu_realizefn;
mcc->parent_reset = cc->reset;
cc->reset = m68k_cpu_reset;
cc->class_by_name = m68k_cpu_class_by_name;
cc->has_work = m68k_cpu_has_work;
cc->do_interrupt = m68k_cpu_do_interrupt;
cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
cc->dump_state = m68k_cpu_dump_state;
cc->set_pc = m68k_cpu_set_pc;
cc->gdb_read_register = m68k_cpu_gdb_read_register;
cc->gdb_write_register = m68k_cpu_gdb_write_register;
#ifdef CONFIG_USER_ONLY
cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault;
#else
cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
#endif
cc->disas_set_info = m68k_cpu_disas_set_info;
cc->gdb_num_core_regs = 18;
cc->gdb_core_xml_file = "cf-core.xml";
dc->vmsd = &vmstate_m68k_cpu;
}
static void register_cpu_type(const M68kCPUInfo *info)
{
TypeInfo type_info = {
.parent = TYPE_M68K_CPU,
.instance_init = info->instance_init,
};
type_info.name = g_strdup_printf("%s-" TYPE_M68K_CPU, info->name);
type_register(&type_info);
g_free((void *)type_info.name);
}
static const TypeInfo m68k_cpu_type_info = {
.name = TYPE_M68K_CPU,
.parent = TYPE_CPU,
.instance_size = sizeof(M68kCPU),
.instance_init = m68k_cpu_initfn,
.abstract = true,
.class_size = sizeof(M68kCPUClass),
.class_init = m68k_cpu_class_init,
};
static void m68k_cpu_register_types(void)
{
int i;
type_register_static(&m68k_cpu_type_info);
for (i = 0; i < ARRAY_SIZE(m68k_cpus); i++) {
register_cpu_type(&m68k_cpus[i]);
}
}
type_init(m68k_cpu_register_types)

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/*
* m68k virtual CPU header
*
* Copyright (c) 2005-2007 CodeSourcery
* Written by Paul Brook
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef M68K_CPU_H
#define M68K_CPU_H
#define TARGET_LONG_BITS 32
#define CPUArchState struct CPUM68KState
#include "qemu-common.h"
#include "exec/cpu-defs.h"
#include "cpu-qom.h"
#include "fpu/softfloat.h"
#define OS_BYTE 0
#define OS_WORD 1
#define OS_LONG 2
#define OS_SINGLE 3
#define OS_DOUBLE 4
#define OS_EXTENDED 5
#define OS_PACKED 6
#define MAX_QREGS 32
#define EXCP_ACCESS 2 /* Access (MMU) error. */
#define EXCP_ADDRESS 3 /* Address error. */
#define EXCP_ILLEGAL 4 /* Illegal instruction. */
#define EXCP_DIV0 5 /* Divide by zero */
#define EXCP_PRIVILEGE 8 /* Privilege violation. */
#define EXCP_TRACE 9
#define EXCP_LINEA 10 /* Unimplemented line-A (MAC) opcode. */
#define EXCP_LINEF 11 /* Unimplemented line-F (FPU) opcode. */
#define EXCP_DEBUGNBP 12 /* Non-breakpoint debug interrupt. */
#define EXCP_DEBEGBP 13 /* Breakpoint debug interrupt. */
#define EXCP_FORMAT 14 /* RTE format error. */
#define EXCP_UNINITIALIZED 15
#define EXCP_TRAP0 32 /* User trap #0. */
#define EXCP_TRAP15 47 /* User trap #15. */
#define EXCP_UNSUPPORTED 61
#define EXCP_ICE 13
#define EXCP_RTE 0x100
#define EXCP_HALT_INSN 0x101
#define NB_MMU_MODES 2
#define TARGET_INSN_START_EXTRA_WORDS 1
typedef struct CPUM68KState {
uint32_t dregs[8];
uint32_t aregs[8];
uint32_t pc;
uint32_t sr;
/* SSP and USP. The current_sp is stored in aregs[7], the other here. */
int current_sp;
uint32_t sp[2];
/* Condition flags. */
uint32_t cc_op;
uint32_t cc_x; /* always 0/1 */
uint32_t cc_n; /* in bit 31 (i.e. negative) */
uint32_t cc_v; /* in bit 31, unused, or computed from cc_n and cc_v */
uint32_t cc_c; /* either 0/1, unused, or computed from cc_n and cc_v */
uint32_t cc_z; /* == 0 or unused */
float64 fregs[8];
float64 fp_result;
uint32_t fpcr;
uint32_t fpsr;
float_status fp_status;
uint64_t mactmp;
/* EMAC Hardware deals with 48-bit values composed of one 32-bit and
two 8-bit parts. We store a single 64-bit value and
rearrange/extend this when changing modes. */
uint64_t macc[4];
uint32_t macsr;
uint32_t mac_mask;
/* Temporary storage for DIV helpers. */
uint32_t div1;
uint32_t div2;
/* MMU status. */
struct {
uint32_t ar;
} mmu;
/* Control registers. */
uint32_t vbr;
uint32_t mbar;
uint32_t rambar0;
uint32_t cacr;
int pending_vector;
int pending_level;
uint32_t qregs[MAX_QREGS];
CPU_COMMON
/* Fields from here on are preserved across CPU reset. */
uint32_t features;
} CPUM68KState;
/**
* M68kCPU:
* @env: #CPUM68KState
*
* A Motorola 68k CPU.
*/
struct M68kCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
CPUM68KState env;
};
static inline M68kCPU *m68k_env_get_cpu(CPUM68KState *env)
{
return container_of(env, M68kCPU, env);
}
#define ENV_GET_CPU(e) CPU(m68k_env_get_cpu(e))
#define ENV_OFFSET offsetof(M68kCPU, env)
void m68k_cpu_do_interrupt(CPUState *cpu);
bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req);
void m68k_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
int flags);
hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void m68k_tcg_init(void);
void m68k_cpu_init_gdb(M68kCPU *cpu);
M68kCPU *cpu_m68k_init(const char *cpu_model);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
int cpu_m68k_signal_handler(int host_signum, void *pinfo,
void *puc);
uint32_t cpu_m68k_get_ccr(CPUM68KState *env);
void cpu_m68k_set_ccr(CPUM68KState *env, uint32_t);
/* Instead of computing the condition codes after each m68k instruction,
* QEMU just stores one operand (called CC_SRC), the result
* (called CC_DEST) and the type of operation (called CC_OP). When the
* condition codes are needed, the condition codes can be calculated
* using this information. Condition codes are not generated if they
* are only needed for conditional branches.
*/
typedef enum {
/* Translator only -- use env->cc_op. */
CC_OP_DYNAMIC = -1,
/* Each flag bit computed into cc_[xcnvz]. */
CC_OP_FLAGS,
/* X in cc_x, C = X, N in cc_n, Z in cc_n, V via cc_n/cc_v. */
CC_OP_ADDB, CC_OP_ADDW, CC_OP_ADDL,
CC_OP_SUBB, CC_OP_SUBW, CC_OP_SUBL,
/* X in cc_x, {N,Z,C,V} via cc_n/cc_v. */
CC_OP_CMPB, CC_OP_CMPW, CC_OP_CMPL,
/* X in cc_x, C = 0, V = 0, N in cc_n, Z in cc_n. */
CC_OP_LOGIC,
CC_OP_NB
} CCOp;
#define CCF_C 0x01
#define CCF_V 0x02
#define CCF_Z 0x04
#define CCF_N 0x08
#define CCF_X 0x10
#define SR_I_SHIFT 8
#define SR_I 0x0700
#define SR_M 0x1000
#define SR_S 0x2000
#define SR_T 0x8000
#define M68K_SSP 0
#define M68K_USP 1
/* CACR fields are implementation defined, but some bits are common. */
#define M68K_CACR_EUSP 0x10
#define MACSR_PAV0 0x100
#define MACSR_OMC 0x080
#define MACSR_SU 0x040
#define MACSR_FI 0x020
#define MACSR_RT 0x010
#define MACSR_N 0x008
#define MACSR_Z 0x004
#define MACSR_V 0x002
#define MACSR_EV 0x001
void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector);
void m68k_switch_sp(CPUM68KState *env);
#define M68K_FPCR_PREC (1 << 6)
void do_m68k_semihosting(CPUM68KState *env, int nr);
/* There are 4 ColdFire core ISA revisions: A, A+, B and C.
Each feature covers the subset of instructions common to the
ISA revisions mentioned. */
enum m68k_features {
M68K_FEATURE_M68000,
M68K_FEATURE_CF_ISA_A,
M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
M68K_FEATURE_BRAL, /* Long unconditional branch. (ISA A+ or B). */
M68K_FEATURE_CF_FPU,
M68K_FEATURE_CF_MAC,
M68K_FEATURE_CF_EMAC,
M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */
M68K_FEATURE_USP, /* User Stack Pointer. (ISA A+, B or C). */
M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
M68K_FEATURE_WORD_INDEX, /* word sized address index registers. */
M68K_FEATURE_SCALED_INDEX, /* scaled address index registers. */
M68K_FEATURE_LONG_MULDIV, /* 32 bit multiply/divide. */
M68K_FEATURE_QUAD_MULDIV, /* 64 bit multiply/divide. */
M68K_FEATURE_BCCL, /* Long conditional branches. */
M68K_FEATURE_BITFIELD, /* Bit field insns. */
M68K_FEATURE_FPU,
M68K_FEATURE_CAS,
M68K_FEATURE_BKPT,
};
static inline int m68k_feature(CPUM68KState *env, int feature)
{
return (env->features & (1u << feature)) != 0;
}
void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf);
void register_m68k_insns (CPUM68KState *env);
#ifdef CONFIG_USER_ONLY
/* Coldfire Linux uses 8k pages
* and m68k linux uses 4k pages
* use the smaller one
*/
#define TARGET_PAGE_BITS 12
#else
/* Smallest TLB entry size is 1k. */
#define TARGET_PAGE_BITS 10
#endif
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#define cpu_init(cpu_model) CPU(cpu_m68k_init(cpu_model))
#define cpu_signal_handler cpu_m68k_signal_handler
#define cpu_list m68k_cpu_list
/* MMU modes definitions */
#define MMU_MODE0_SUFFIX _kernel
#define MMU_MODE1_SUFFIX _user
#define MMU_USER_IDX 1
static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch)
{
return (env->sr & SR_S) == 0 ? 1 : 0;
}
int m68k_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
int mmu_idx);
#include "exec/cpu-all.h"
static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *flags)
{
*pc = env->pc;
*cs_base = 0;
*flags = (env->fpcr & M68K_FPCR_PREC) /* Bit 6 */
| (env->sr & SR_S) /* Bit 13 */
| ((env->macsr >> 4) & 0xf); /* Bits 0-3 */
}
#endif

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/*
* m68k gdb server stub
*
* Copyright (c) 2003-2005 Fabrice Bellard
* Copyright (c) 2013 SUSE LINUX Products GmbH
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "cpu.h"
#include "exec/gdbstub.h"
int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
M68kCPU *cpu = M68K_CPU(cs);
CPUM68KState *env = &cpu->env;
if (n < 8) {
/* D0-D7 */
return gdb_get_reg32(mem_buf, env->dregs[n]);
} else if (n < 16) {
/* A0-A7 */
return gdb_get_reg32(mem_buf, env->aregs[n - 8]);
} else {
switch (n) {
case 16:
return gdb_get_reg32(mem_buf, env->sr);
case 17:
return gdb_get_reg32(mem_buf, env->pc);
}
}
/* FP registers not included here because they vary between
ColdFire and m68k. Use XML bits for these. */
return 0;
}
int m68k_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
M68kCPU *cpu = M68K_CPU(cs);
CPUM68KState *env = &cpu->env;
uint32_t tmp;
tmp = ldl_p(mem_buf);
if (n < 8) {
/* D0-D7 */
env->dregs[n] = tmp;
} else if (n < 16) {
/* A0-A7 */
env->aregs[n - 8] = tmp;
} else {
switch (n) {
case 16:
env->sr = tmp;
break;
case 17:
env->pc = tmp;
break;
default:
return 0;
}
}
return 4;
}

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/*
* m68k op helpers
*
* Copyright (c) 2006-2007 CodeSourcery
* Written by Paul Brook
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/gdbstub.h"
#include "exec/helper-proto.h"
#define SIGNBIT (1u << 31)
/* Sort alphabetically, except for "any". */
static gint m68k_cpu_list_compare(gconstpointer a, gconstpointer b)
{
ObjectClass *class_a = (ObjectClass *)a;
ObjectClass *class_b = (ObjectClass *)b;
const char *name_a, *name_b;
name_a = object_class_get_name(class_a);
name_b = object_class_get_name(class_b);
if (strcmp(name_a, "any-" TYPE_M68K_CPU) == 0) {
return 1;
} else if (strcmp(name_b, "any-" TYPE_M68K_CPU) == 0) {
return -1;
} else {
return strcasecmp(name_a, name_b);
}
}
static void m68k_cpu_list_entry(gpointer data, gpointer user_data)
{
ObjectClass *c = data;
CPUListState *s = user_data;
const char *typename;
char *name;
typename = object_class_get_name(c);
name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_M68K_CPU));
(*s->cpu_fprintf)(s->file, "%s\n",
name);
g_free(name);
}
void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
CPUListState s = {
.file = f,
.cpu_fprintf = cpu_fprintf,
};
GSList *list;
list = object_class_get_list(TYPE_M68K_CPU, false);
list = g_slist_sort(list, m68k_cpu_list_compare);
g_slist_foreach(list, m68k_cpu_list_entry, &s);
g_slist_free(list);
}
static int fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
stfq_p(mem_buf, env->fregs[n]);
return 8;
}
if (n < 11) {
/* FP control registers (not implemented) */
memset(mem_buf, 0, 4);
return 4;
}
return 0;
}
static int fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
env->fregs[n] = ldfq_p(mem_buf);
return 8;
}
if (n < 11) {
/* FP control registers (not implemented) */
return 4;
}
return 0;
}
M68kCPU *cpu_m68k_init(const char *cpu_model)
{
M68kCPU *cpu;
CPUM68KState *env;
ObjectClass *oc;
oc = cpu_class_by_name(TYPE_M68K_CPU, cpu_model);
if (oc == NULL) {
return NULL;
}
cpu = M68K_CPU(object_new(object_class_get_name(oc)));
env = &cpu->env;
register_m68k_insns(env);
object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
return cpu;
}
void m68k_cpu_init_gdb(M68kCPU *cpu)
{
CPUState *cs = CPU(cpu);
CPUM68KState *env = &cpu->env;
if (m68k_feature(env, M68K_FEATURE_CF_FPU)) {
gdb_register_coprocessor(cs, fpu_gdb_get_reg, fpu_gdb_set_reg,
11, "cf-fp.xml", 18);
}
/* TODO: Add [E]MAC registers. */
}
void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
switch (reg) {
case 0x02: /* CACR */
env->cacr = val;
m68k_switch_sp(env);
break;
case 0x04: case 0x05: case 0x06: case 0x07: /* ACR[0-3] */
/* TODO: Implement Access Control Registers. */
break;
case 0x801: /* VBR */
env->vbr = val;
break;
/* TODO: Implement control registers. */
default:
cpu_abort(CPU(cpu), "Unimplemented control register write 0x%x = 0x%x\n",
reg, val);
}
}
void HELPER(set_macsr)(CPUM68KState *env, uint32_t val)
{
uint32_t acc;
int8_t exthigh;
uint8_t extlow;
uint64_t regval;
int i;
if ((env->macsr ^ val) & (MACSR_FI | MACSR_SU)) {
for (i = 0; i < 4; i++) {
regval = env->macc[i];
exthigh = regval >> 40;
if (env->macsr & MACSR_FI) {
acc = regval >> 8;
extlow = regval;
} else {
acc = regval;
extlow = regval >> 32;
}
if (env->macsr & MACSR_FI) {
regval = (((uint64_t)acc) << 8) | extlow;
regval |= ((int64_t)exthigh) << 40;
} else if (env->macsr & MACSR_SU) {
regval = acc | (((int64_t)extlow) << 32);
regval |= ((int64_t)exthigh) << 40;
} else {
regval = acc | (((uint64_t)extlow) << 32);
regval |= ((uint64_t)(uint8_t)exthigh) << 40;
}
env->macc[i] = regval;
}
}
env->macsr = val;
}
void m68k_switch_sp(CPUM68KState *env)
{
int new_sp;
env->sp[env->current_sp] = env->aregs[7];
new_sp = (env->sr & SR_S && env->cacr & M68K_CACR_EUSP)
? M68K_SSP : M68K_USP;
env->aregs[7] = env->sp[new_sp];
env->current_sp = new_sp;
}
#if defined(CONFIG_USER_ONLY)
int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
int mmu_idx)
{
M68kCPU *cpu = M68K_CPU(cs);
cs->exception_index = EXCP_ACCESS;
cpu->env.mmu.ar = address;
return 1;
}
#else
/* MMU */
/* TODO: This will need fixing once the MMU is implemented. */
hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
return addr;
}
int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
int mmu_idx)
{
int prot;
address &= TARGET_PAGE_MASK;
prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
tlb_set_page(cs, address, address, prot, mmu_idx, TARGET_PAGE_SIZE);
return 0;
}
/* Notify CPU of a pending interrupt. Prioritization and vectoring should
be handled by the interrupt controller. Real hardware only requests
the vector when the interrupt is acknowledged by the CPU. For
simplicitly we calculate it when the interrupt is signalled. */
void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector)
{
CPUState *cs = CPU(cpu);
CPUM68KState *env = &cpu->env;
env->pending_level = level;
env->pending_vector = vector;
if (level) {
cpu_interrupt(cs, CPU_INTERRUPT_HARD);
} else {
cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
}
}
#endif
uint32_t HELPER(bitrev)(uint32_t x)
{
x = ((x >> 1) & 0x55555555u) | ((x << 1) & 0xaaaaaaaau);
x = ((x >> 2) & 0x33333333u) | ((x << 2) & 0xccccccccu);
x = ((x >> 4) & 0x0f0f0f0fu) | ((x << 4) & 0xf0f0f0f0u);
return bswap32(x);
}
uint32_t HELPER(ff1)(uint32_t x)
{
int n;
for (n = 32; x; n--)
x >>= 1;
return n;
}
uint32_t HELPER(sats)(uint32_t val, uint32_t v)
{
/* The result has the opposite sign to the original value. */
if ((int32_t)v < 0) {
val = (((int32_t)val) >> 31) ^ SIGNBIT;
}
return val;
}
void HELPER(set_sr)(CPUM68KState *env, uint32_t val)
{
env->sr = val & 0xffe0;
cpu_m68k_set_ccr(env, val);
m68k_switch_sp(env);
}
uint32_t HELPER(shl_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
{
uint64_t result;
shift &= 63;
result = (uint64_t)val << shift;
env->cc_c = (result >> 32) & 1;
env->cc_n = result;
env->cc_z = result;
env->cc_v = 0;
env->cc_x = shift ? env->cc_c : env->cc_x;
return result;
}
uint32_t HELPER(shr_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
{
uint64_t temp;
uint32_t result;
shift &= 63;
temp = (uint64_t)val << 32 >> shift;
result = temp >> 32;
env->cc_c = (temp >> 31) & 1;
env->cc_n = result;
env->cc_z = result;
env->cc_v = 0;
env->cc_x = shift ? env->cc_c : env->cc_x;
return result;
}
uint32_t HELPER(sar_cc)(CPUM68KState *env, uint32_t val, uint32_t shift)
{
uint64_t temp;
uint32_t result;
shift &= 63;
temp = (int64_t)val << 32 >> shift;
result = temp >> 32;
env->cc_c = (temp >> 31) & 1;
env->cc_n = result;
env->cc_z = result;
env->cc_v = result ^ val;
env->cc_x = shift ? env->cc_c : env->cc_x;
return result;
}
/* FPU helpers. */
uint32_t HELPER(f64_to_i32)(CPUM68KState *env, float64 val)
{
return float64_to_int32(val, &env->fp_status);
}
float32 HELPER(f64_to_f32)(CPUM68KState *env, float64 val)
{
return float64_to_float32(val, &env->fp_status);
}
float64 HELPER(i32_to_f64)(CPUM68KState *env, uint32_t val)
{
return int32_to_float64(val, &env->fp_status);
}
float64 HELPER(f32_to_f64)(CPUM68KState *env, float32 val)
{
return float32_to_float64(val, &env->fp_status);
}
float64 HELPER(iround_f64)(CPUM68KState *env, float64 val)
{
return float64_round_to_int(val, &env->fp_status);
}
float64 HELPER(itrunc_f64)(CPUM68KState *env, float64 val)
{
return float64_trunc_to_int(val, &env->fp_status);
}
float64 HELPER(sqrt_f64)(CPUM68KState *env, float64 val)
{
return float64_sqrt(val, &env->fp_status);
}
float64 HELPER(abs_f64)(float64 val)
{
return float64_abs(val);
}
float64 HELPER(chs_f64)(float64 val)
{
return float64_chs(val);
}
float64 HELPER(add_f64)(CPUM68KState *env, float64 a, float64 b)
{
return float64_add(a, b, &env->fp_status);
}
float64 HELPER(sub_f64)(CPUM68KState *env, float64 a, float64 b)
{
return float64_sub(a, b, &env->fp_status);
}
float64 HELPER(mul_f64)(CPUM68KState *env, float64 a, float64 b)
{
return float64_mul(a, b, &env->fp_status);
}
float64 HELPER(div_f64)(CPUM68KState *env, float64 a, float64 b)
{
return float64_div(a, b, &env->fp_status);
}
float64 HELPER(sub_cmp_f64)(CPUM68KState *env, float64 a, float64 b)
{
/* ??? This may incorrectly raise exceptions. */
/* ??? Should flush denormals to zero. */
float64 res;
res = float64_sub(a, b, &env->fp_status);
if (float64_is_quiet_nan(res, &env->fp_status)) {
/* +/-inf compares equal against itself, but sub returns nan. */
if (!float64_is_quiet_nan(a, &env->fp_status)
&& !float64_is_quiet_nan(b, &env->fp_status)) {
res = float64_zero;
if (float64_lt_quiet(a, res, &env->fp_status))
res = float64_chs(res);
}
}
return res;
}
uint32_t HELPER(compare_f64)(CPUM68KState *env, float64 val)
{
return float64_compare_quiet(val, float64_zero, &env->fp_status);
}
/* MAC unit. */
/* FIXME: The MAC unit implementation is a bit of a mess. Some helpers
take values, others take register numbers and manipulate the contents
in-place. */
void HELPER(mac_move)(CPUM68KState *env, uint32_t dest, uint32_t src)
{
uint32_t mask;
env->macc[dest] = env->macc[src];
mask = MACSR_PAV0 << dest;
if (env->macsr & (MACSR_PAV0 << src))
env->macsr |= mask;
else
env->macsr &= ~mask;
}
uint64_t HELPER(macmuls)(CPUM68KState *env, uint32_t op1, uint32_t op2)
{
int64_t product;
int64_t res;
product = (uint64_t)op1 * op2;
res = (product << 24) >> 24;
if (res != product) {
env->macsr |= MACSR_V;
if (env->macsr & MACSR_OMC) {
/* Make sure the accumulate operation overflows. */
if (product < 0)
res = ~(1ll << 50);
else
res = 1ll << 50;
}
}
return res;
}
uint64_t HELPER(macmulu)(CPUM68KState *env, uint32_t op1, uint32_t op2)
{
uint64_t product;
product = (uint64_t)op1 * op2;
if (product & (0xffffffull << 40)) {
env->macsr |= MACSR_V;
if (env->macsr & MACSR_OMC) {
/* Make sure the accumulate operation overflows. */
product = 1ll << 50;
} else {
product &= ((1ull << 40) - 1);
}
}
return product;
}
uint64_t HELPER(macmulf)(CPUM68KState *env, uint32_t op1, uint32_t op2)
{
uint64_t product;
uint32_t remainder;
product = (uint64_t)op1 * op2;
if (env->macsr & MACSR_RT) {
remainder = product & 0xffffff;
product >>= 24;
if (remainder > 0x800000)
product++;
else if (remainder == 0x800000)
product += (product & 1);
} else {
product >>= 24;
}
return product;
}
void HELPER(macsats)(CPUM68KState *env, uint32_t acc)
{
int64_t tmp;
int64_t result;
tmp = env->macc[acc];
result = ((tmp << 16) >> 16);
if (result != tmp) {
env->macsr |= MACSR_V;
}
if (env->macsr & MACSR_V) {
env->macsr |= MACSR_PAV0 << acc;
if (env->macsr & MACSR_OMC) {
/* The result is saturated to 32 bits, despite overflow occurring
at 48 bits. Seems weird, but that's what the hardware docs
say. */
result = (result >> 63) ^ 0x7fffffff;
}
}
env->macc[acc] = result;
}
void HELPER(macsatu)(CPUM68KState *env, uint32_t acc)
{
uint64_t val;
val = env->macc[acc];
if (val & (0xffffull << 48)) {
env->macsr |= MACSR_V;
}
if (env->macsr & MACSR_V) {
env->macsr |= MACSR_PAV0 << acc;
if (env->macsr & MACSR_OMC) {
if (val > (1ull << 53))
val = 0;
else
val = (1ull << 48) - 1;
} else {
val &= ((1ull << 48) - 1);
}
}
env->macc[acc] = val;
}
void HELPER(macsatf)(CPUM68KState *env, uint32_t acc)
{
int64_t sum;
int64_t result;
sum = env->macc[acc];
result = (sum << 16) >> 16;
if (result != sum) {
env->macsr |= MACSR_V;
}
if (env->macsr & MACSR_V) {
env->macsr |= MACSR_PAV0 << acc;
if (env->macsr & MACSR_OMC) {
result = (result >> 63) ^ 0x7fffffffffffll;
}
}
env->macc[acc] = result;
}
void HELPER(mac_set_flags)(CPUM68KState *env, uint32_t acc)
{
uint64_t val;
val = env->macc[acc];
if (val == 0) {
env->macsr |= MACSR_Z;
} else if (val & (1ull << 47)) {
env->macsr |= MACSR_N;
}
if (env->macsr & (MACSR_PAV0 << acc)) {
env->macsr |= MACSR_V;
}
if (env->macsr & MACSR_FI) {
val = ((int64_t)val) >> 40;
if (val != 0 && val != -1)
env->macsr |= MACSR_EV;
} else if (env->macsr & MACSR_SU) {
val = ((int64_t)val) >> 32;
if (val != 0 && val != -1)
env->macsr |= MACSR_EV;
} else {
if ((val >> 32) != 0)
env->macsr |= MACSR_EV;
}
}
#define EXTSIGN(val, index) ( \
(index == 0) ? (int8_t)(val) : ((index == 1) ? (int16_t)(val) : (val)) \
)
#define COMPUTE_CCR(op, x, n, z, v, c) { \
switch (op) { \
case CC_OP_FLAGS: \
/* Everything in place. */ \
break; \
case CC_OP_ADDB: \
case CC_OP_ADDW: \
case CC_OP_ADDL: \
res = n; \
src2 = v; \
src1 = EXTSIGN(res - src2, op - CC_OP_ADDB); \
c = x; \
z = n; \
v = (res ^ src1) & ~(src1 ^ src2); \
break; \
case CC_OP_SUBB: \
case CC_OP_SUBW: \
case CC_OP_SUBL: \
res = n; \
src2 = v; \
src1 = EXTSIGN(res + src2, op - CC_OP_SUBB); \
c = x; \
z = n; \
v = (res ^ src1) & (src1 ^ src2); \
break; \
case CC_OP_CMPB: \
case CC_OP_CMPW: \
case CC_OP_CMPL: \
src1 = n; \
src2 = v; \
res = EXTSIGN(src1 - src2, op - CC_OP_CMPB); \
n = res; \
z = res; \
c = src1 < src2; \
v = (res ^ src1) & (src1 ^ src2); \
break; \
case CC_OP_LOGIC: \
c = v = 0; \
z = n; \
break; \
default: \
cpu_abort(CPU(m68k_env_get_cpu(env)), "Bad CC_OP %d", op); \
} \
} while (0)
uint32_t cpu_m68k_get_ccr(CPUM68KState *env)
{
uint32_t x, c, n, z, v;
uint32_t res, src1, src2;
x = env->cc_x;
n = env->cc_n;
z = env->cc_z;
v = env->cc_v;
c = env->cc_c;
COMPUTE_CCR(env->cc_op, x, n, z, v, c);
n = n >> 31;
z = (z == 0);
v = v >> 31;
return x * CCF_X + n * CCF_N + z * CCF_Z + v * CCF_V + c * CCF_C;
}
uint32_t HELPER(get_ccr)(CPUM68KState *env)
{
return cpu_m68k_get_ccr(env);
}
void cpu_m68k_set_ccr(CPUM68KState *env, uint32_t ccr)
{
env->cc_x = (ccr & CCF_X ? 1 : 0);
env->cc_n = (ccr & CCF_N ? -1 : 0);
env->cc_z = (ccr & CCF_Z ? 0 : 1);
env->cc_v = (ccr & CCF_V ? -1 : 0);
env->cc_c = (ccr & CCF_C ? 1 : 0);
env->cc_op = CC_OP_FLAGS;
}
void HELPER(set_ccr)(CPUM68KState *env, uint32_t ccr)
{
cpu_m68k_set_ccr(env, ccr);
}
void HELPER(flush_flags)(CPUM68KState *env, uint32_t cc_op)
{
uint32_t res, src1, src2;
COMPUTE_CCR(cc_op, env->cc_x, env->cc_n, env->cc_z, env->cc_v, env->cc_c);
env->cc_op = CC_OP_FLAGS;
}
uint32_t HELPER(get_macf)(CPUM68KState *env, uint64_t val)
{
int rem;
uint32_t result;
if (env->macsr & MACSR_SU) {
/* 16-bit rounding. */
rem = val & 0xffffff;
val = (val >> 24) & 0xffffu;
if (rem > 0x800000)
val++;
else if (rem == 0x800000)
val += (val & 1);
} else if (env->macsr & MACSR_RT) {
/* 32-bit rounding. */
rem = val & 0xff;
val >>= 8;
if (rem > 0x80)
val++;
else if (rem == 0x80)
val += (val & 1);
} else {
/* No rounding. */
val >>= 8;
}
if (env->macsr & MACSR_OMC) {
/* Saturate. */
if (env->macsr & MACSR_SU) {
if (val != (uint16_t) val) {
result = ((val >> 63) ^ 0x7fff) & 0xffff;
} else {
result = val & 0xffff;
}
} else {
if (val != (uint32_t)val) {
result = ((uint32_t)(val >> 63) & 0x7fffffff);
} else {
result = (uint32_t)val;
}
}
} else {
/* No saturation. */
if (env->macsr & MACSR_SU) {
result = val & 0xffff;
} else {
result = (uint32_t)val;
}
}
return result;
}
uint32_t HELPER(get_macs)(uint64_t val)
{
if (val == (int32_t)val) {
return (int32_t)val;
} else {
return (val >> 61) ^ ~SIGNBIT;
}
}
uint32_t HELPER(get_macu)(uint64_t val)
{
if ((val >> 32) == 0) {
return (uint32_t)val;
} else {
return 0xffffffffu;
}
}
uint32_t HELPER(get_mac_extf)(CPUM68KState *env, uint32_t acc)
{
uint32_t val;
val = env->macc[acc] & 0x00ff;
val |= (env->macc[acc] >> 32) & 0xff00;
val |= (env->macc[acc + 1] << 16) & 0x00ff0000;
val |= (env->macc[acc + 1] >> 16) & 0xff000000;
return val;
}
uint32_t HELPER(get_mac_exti)(CPUM68KState *env, uint32_t acc)
{
uint32_t val;
val = (env->macc[acc] >> 32) & 0xffff;
val |= (env->macc[acc + 1] >> 16) & 0xffff0000;
return val;
}
void HELPER(set_mac_extf)(CPUM68KState *env, uint32_t val, uint32_t acc)
{
int64_t res;
int32_t tmp;
res = env->macc[acc] & 0xffffffff00ull;
tmp = (int16_t)(val & 0xff00);
res |= ((int64_t)tmp) << 32;
res |= val & 0xff;
env->macc[acc] = res;
res = env->macc[acc + 1] & 0xffffffff00ull;
tmp = (val & 0xff000000);
res |= ((int64_t)tmp) << 16;
res |= (val >> 16) & 0xff;
env->macc[acc + 1] = res;
}
void HELPER(set_mac_exts)(CPUM68KState *env, uint32_t val, uint32_t acc)
{
int64_t res;
int32_t tmp;
res = (uint32_t)env->macc[acc];
tmp = (int16_t)val;
res |= ((int64_t)tmp) << 32;
env->macc[acc] = res;
res = (uint32_t)env->macc[acc + 1];
tmp = val & 0xffff0000;
res |= (int64_t)tmp << 16;
env->macc[acc + 1] = res;
}
void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
{
uint64_t res;
res = (uint32_t)env->macc[acc];
res |= ((uint64_t)(val & 0xffff)) << 32;
env->macc[acc] = res;
res = (uint32_t)env->macc[acc + 1];
res |= (uint64_t)(val & 0xffff0000) << 16;
env->macc[acc + 1] = res;
}

49
target/m68k/helper.h Normal file
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DEF_HELPER_1(bitrev, i32, i32)
DEF_HELPER_1(ff1, i32, i32)
DEF_HELPER_FLAGS_2(sats, TCG_CALL_NO_RWG_SE, i32, i32, i32)
DEF_HELPER_2(divu, void, env, i32)
DEF_HELPER_2(divs, void, env, i32)
DEF_HELPER_3(shl_cc, i32, env, i32, i32)
DEF_HELPER_3(shr_cc, i32, env, i32, i32)
DEF_HELPER_3(sar_cc, i32, env, i32, i32)
DEF_HELPER_2(set_sr, void, env, i32)
DEF_HELPER_3(movec, void, env, i32, i32)
DEF_HELPER_2(f64_to_i32, f32, env, f64)
DEF_HELPER_2(f64_to_f32, f32, env, f64)
DEF_HELPER_2(i32_to_f64, f64, env, i32)
DEF_HELPER_2(f32_to_f64, f64, env, f32)
DEF_HELPER_2(iround_f64, f64, env, f64)
DEF_HELPER_2(itrunc_f64, f64, env, f64)
DEF_HELPER_2(sqrt_f64, f64, env, f64)
DEF_HELPER_1(abs_f64, f64, f64)
DEF_HELPER_1(chs_f64, f64, f64)
DEF_HELPER_3(add_f64, f64, env, f64, f64)
DEF_HELPER_3(sub_f64, f64, env, f64, f64)
DEF_HELPER_3(mul_f64, f64, env, f64, f64)
DEF_HELPER_3(div_f64, f64, env, f64, f64)
DEF_HELPER_3(sub_cmp_f64, f64, env, f64, f64)
DEF_HELPER_2(compare_f64, i32, env, f64)
DEF_HELPER_3(mac_move, void, env, i32, i32)
DEF_HELPER_3(macmulf, i64, env, i32, i32)
DEF_HELPER_3(macmuls, i64, env, i32, i32)
DEF_HELPER_3(macmulu, i64, env, i32, i32)
DEF_HELPER_2(macsats, void, env, i32)
DEF_HELPER_2(macsatu, void, env, i32)
DEF_HELPER_2(macsatf, void, env, i32)
DEF_HELPER_2(mac_set_flags, void, env, i32)
DEF_HELPER_2(set_macsr, void, env, i32)
DEF_HELPER_2(get_macf, i32, env, i64)
DEF_HELPER_1(get_macs, i32, i64)
DEF_HELPER_1(get_macu, i32, i64)
DEF_HELPER_2(get_mac_extf, i32, env, i32)
DEF_HELPER_2(get_mac_exti, i32, env, i32)
DEF_HELPER_3(set_mac_extf, void, env, i32, i32)
DEF_HELPER_3(set_mac_exts, void, env, i32, i32)
DEF_HELPER_3(set_mac_extu, void, env, i32, i32)
DEF_HELPER_2(flush_flags, void, env, i32)
DEF_HELPER_2(set_ccr, void, env, i32)
DEF_HELPER_FLAGS_1(get_ccr, TCG_CALL_NO_WG_SE, i32, env)
DEF_HELPER_2(raise_exception, void, env, i32)

462
target/m68k/m68k-semi.c Normal file
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/*
* m68k/ColdFire Semihosting syscall interface
*
* Copyright (c) 2005-2007 CodeSourcery.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "cpu.h"
#if defined(CONFIG_USER_ONLY)
#include "qemu.h"
#define SEMIHOSTING_HEAP_SIZE (128 * 1024 * 1024)
#else
#include "qemu-common.h"
#include "exec/gdbstub.h"
#include "exec/softmmu-semi.h"
#endif
#include "qemu/log.h"
#include "sysemu/sysemu.h"
#define HOSTED_EXIT 0
#define HOSTED_INIT_SIM 1
#define HOSTED_OPEN 2
#define HOSTED_CLOSE 3
#define HOSTED_READ 4
#define HOSTED_WRITE 5
#define HOSTED_LSEEK 6
#define HOSTED_RENAME 7
#define HOSTED_UNLINK 8
#define HOSTED_STAT 9
#define HOSTED_FSTAT 10
#define HOSTED_GETTIMEOFDAY 11
#define HOSTED_ISATTY 12
#define HOSTED_SYSTEM 13
typedef uint32_t gdb_mode_t;
typedef uint32_t gdb_time_t;
struct m68k_gdb_stat {
uint32_t gdb_st_dev; /* device */
uint32_t gdb_st_ino; /* inode */
gdb_mode_t gdb_st_mode; /* protection */
uint32_t gdb_st_nlink; /* number of hard links */
uint32_t gdb_st_uid; /* user ID of owner */
uint32_t gdb_st_gid; /* group ID of owner */
uint32_t gdb_st_rdev; /* device type (if inode device) */
uint64_t gdb_st_size; /* total size, in bytes */
uint64_t gdb_st_blksize; /* blocksize for filesystem I/O */
uint64_t gdb_st_blocks; /* number of blocks allocated */
gdb_time_t gdb_st_atime; /* time of last access */
gdb_time_t gdb_st_mtime; /* time of last modification */
gdb_time_t gdb_st_ctime; /* time of last change */
} QEMU_PACKED;
struct gdb_timeval {
gdb_time_t tv_sec; /* second */
uint64_t tv_usec; /* microsecond */
} QEMU_PACKED;
#define GDB_O_RDONLY 0x0
#define GDB_O_WRONLY 0x1
#define GDB_O_RDWR 0x2
#define GDB_O_APPEND 0x8
#define GDB_O_CREAT 0x200
#define GDB_O_TRUNC 0x400
#define GDB_O_EXCL 0x800
static int translate_openflags(int flags)
{
int hf;
if (flags & GDB_O_WRONLY)
hf = O_WRONLY;
else if (flags & GDB_O_RDWR)
hf = O_RDWR;
else
hf = O_RDONLY;
if (flags & GDB_O_APPEND) hf |= O_APPEND;
if (flags & GDB_O_CREAT) hf |= O_CREAT;
if (flags & GDB_O_TRUNC) hf |= O_TRUNC;
if (flags & GDB_O_EXCL) hf |= O_EXCL;
return hf;
}
static void translate_stat(CPUM68KState *env, target_ulong addr, struct stat *s)
{
struct m68k_gdb_stat *p;
if (!(p = lock_user(VERIFY_WRITE, addr, sizeof(struct m68k_gdb_stat), 0)))
/* FIXME - should this return an error code? */
return;
p->gdb_st_dev = cpu_to_be32(s->st_dev);
p->gdb_st_ino = cpu_to_be32(s->st_ino);
p->gdb_st_mode = cpu_to_be32(s->st_mode);
p->gdb_st_nlink = cpu_to_be32(s->st_nlink);
p->gdb_st_uid = cpu_to_be32(s->st_uid);
p->gdb_st_gid = cpu_to_be32(s->st_gid);
p->gdb_st_rdev = cpu_to_be32(s->st_rdev);
p->gdb_st_size = cpu_to_be64(s->st_size);
#ifdef _WIN32
/* Windows stat is missing some fields. */
p->gdb_st_blksize = 0;
p->gdb_st_blocks = 0;
#else
p->gdb_st_blksize = cpu_to_be64(s->st_blksize);
p->gdb_st_blocks = cpu_to_be64(s->st_blocks);
#endif
p->gdb_st_atime = cpu_to_be32(s->st_atime);
p->gdb_st_mtime = cpu_to_be32(s->st_mtime);
p->gdb_st_ctime = cpu_to_be32(s->st_ctime);
unlock_user(p, addr, sizeof(struct m68k_gdb_stat));
}
static void m68k_semi_return_u32(CPUM68KState *env, uint32_t ret, uint32_t err)
{
target_ulong args = env->dregs[1];
if (put_user_u32(ret, args) ||
put_user_u32(err, args + 4)) {
/* The m68k semihosting ABI does not provide any way to report this
* error to the guest, so the best we can do is log it in qemu.
* It is always a guest error not to pass us a valid argument block.
*/
qemu_log_mask(LOG_GUEST_ERROR, "m68k-semihosting: return value "
"discarded because argument block not writable\n");
}
}
static void m68k_semi_return_u64(CPUM68KState *env, uint64_t ret, uint32_t err)
{
target_ulong args = env->dregs[1];
if (put_user_u32(ret >> 32, args) ||
put_user_u32(ret, args + 4) ||
put_user_u32(err, args + 8)) {
/* No way to report this via m68k semihosting ABI; just log it */
qemu_log_mask(LOG_GUEST_ERROR, "m68k-semihosting: return value "
"discarded because argument block not writable\n");
}
}
static int m68k_semi_is_fseek;
static void m68k_semi_cb(CPUState *cs, target_ulong ret, target_ulong err)
{
M68kCPU *cpu = M68K_CPU(cs);
CPUM68KState *env = &cpu->env;
if (m68k_semi_is_fseek) {
/* FIXME: We've already lost the high bits of the fseek
return value. */
m68k_semi_return_u64(env, ret, err);
m68k_semi_is_fseek = 0;
} else {
m68k_semi_return_u32(env, ret, err);
}
}
/* Read the input value from the argument block; fail the semihosting
* call if the memory read fails.
*/
#define GET_ARG(n) do { \
if (get_user_ual(arg ## n, args + (n) * 4)) { \
result = -1; \
errno = EFAULT; \
goto failed; \
} \
} while (0)
void do_m68k_semihosting(CPUM68KState *env, int nr)
{
uint32_t args;
target_ulong arg0, arg1, arg2, arg3;
void *p;
void *q;
uint32_t len;
uint32_t result;
args = env->dregs[1];
switch (nr) {
case HOSTED_EXIT:
gdb_exit(env, env->dregs[0]);
exit(env->dregs[0]);
case HOSTED_OPEN:
GET_ARG(0);
GET_ARG(1);
GET_ARG(2);
GET_ARG(3);
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "open,%s,%x,%x", arg0, (int)arg1,
arg2, arg3);
return;
} else {
p = lock_user_string(arg0);
if (!p) {
/* FIXME - check error code? */
result = -1;
} else {
result = open(p, translate_openflags(arg2), arg3);
unlock_user(p, arg0, 0);
}
}
break;
case HOSTED_CLOSE:
{
/* Ignore attempts to close stdin/out/err. */
GET_ARG(0);
int fd = arg0;
if (fd > 2) {
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "close,%x", arg0);
return;
} else {
result = close(fd);
}
} else {
result = 0;
}
break;
}
case HOSTED_READ:
GET_ARG(0);
GET_ARG(1);
GET_ARG(2);
len = arg2;
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "read,%x,%x,%x",
arg0, arg1, len);
return;
} else {
p = lock_user(VERIFY_WRITE, arg1, len, 0);
if (!p) {
/* FIXME - check error code? */
result = -1;
} else {
result = read(arg0, p, len);
unlock_user(p, arg1, len);
}
}
break;
case HOSTED_WRITE:
GET_ARG(0);
GET_ARG(1);
GET_ARG(2);
len = arg2;
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "write,%x,%x,%x",
arg0, arg1, len);
return;
} else {
p = lock_user(VERIFY_READ, arg1, len, 1);
if (!p) {
/* FIXME - check error code? */
result = -1;
} else {
result = write(arg0, p, len);
unlock_user(p, arg0, 0);
}
}
break;
case HOSTED_LSEEK:
{
uint64_t off;
GET_ARG(0);
GET_ARG(1);
GET_ARG(2);
GET_ARG(3);
off = (uint32_t)arg2 | ((uint64_t)arg1 << 32);
if (use_gdb_syscalls()) {
m68k_semi_is_fseek = 1;
gdb_do_syscall(m68k_semi_cb, "fseek,%x,%lx,%x",
arg0, off, arg3);
} else {
off = lseek(arg0, off, arg3);
m68k_semi_return_u64(env, off, errno);
}
return;
}
case HOSTED_RENAME:
GET_ARG(0);
GET_ARG(1);
GET_ARG(2);
GET_ARG(3);
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "rename,%s,%s",
arg0, (int)arg1, arg2, (int)arg3);
return;
} else {
p = lock_user_string(arg0);
q = lock_user_string(arg2);
if (!p || !q) {
/* FIXME - check error code? */
result = -1;
} else {
result = rename(p, q);
}
unlock_user(p, arg0, 0);
unlock_user(q, arg2, 0);
}
break;
case HOSTED_UNLINK:
GET_ARG(0);
GET_ARG(1);
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "unlink,%s",
arg0, (int)arg1);
return;
} else {
p = lock_user_string(arg0);
if (!p) {
/* FIXME - check error code? */
result = -1;
} else {
result = unlink(p);
unlock_user(p, arg0, 0);
}
}
break;
case HOSTED_STAT:
GET_ARG(0);
GET_ARG(1);
GET_ARG(2);
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "stat,%s,%x",
arg0, (int)arg1, arg2);
return;
} else {
struct stat s;
p = lock_user_string(arg0);
if (!p) {
/* FIXME - check error code? */
result = -1;
} else {
result = stat(p, &s);
unlock_user(p, arg0, 0);
}
if (result == 0) {
translate_stat(env, arg2, &s);
}
}
break;
case HOSTED_FSTAT:
GET_ARG(0);
GET_ARG(1);
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "fstat,%x,%x",
arg0, arg1);
return;
} else {
struct stat s;
result = fstat(arg0, &s);
if (result == 0) {
translate_stat(env, arg1, &s);
}
}
break;
case HOSTED_GETTIMEOFDAY:
GET_ARG(0);
GET_ARG(1);
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "gettimeofday,%x,%x",
arg0, arg1);
return;
} else {
qemu_timeval tv;
struct gdb_timeval *p;
result = qemu_gettimeofday(&tv);
if (result != 0) {
if (!(p = lock_user(VERIFY_WRITE,
arg0, sizeof(struct gdb_timeval), 0))) {
/* FIXME - check error code? */
result = -1;
} else {
p->tv_sec = cpu_to_be32(tv.tv_sec);
p->tv_usec = cpu_to_be64(tv.tv_usec);
unlock_user(p, arg0, sizeof(struct gdb_timeval));
}
}
}
break;
case HOSTED_ISATTY:
GET_ARG(0);
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "isatty,%x", arg0);
return;
} else {
result = isatty(arg0);
}
break;
case HOSTED_SYSTEM:
GET_ARG(0);
GET_ARG(1);
if (use_gdb_syscalls()) {
gdb_do_syscall(m68k_semi_cb, "system,%s",
arg0, (int)arg1);
return;
} else {
p = lock_user_string(arg0);
if (!p) {
/* FIXME - check error code? */
result = -1;
} else {
result = system(p);
unlock_user(p, arg0, 0);
}
}
break;
case HOSTED_INIT_SIM:
#if defined(CONFIG_USER_ONLY)
{
CPUState *cs = CPU(m68k_env_get_cpu(env));
TaskState *ts = cs->opaque;
/* Allocate the heap using sbrk. */
if (!ts->heap_limit) {
abi_ulong ret;
uint32_t size;
uint32_t base;
base = do_brk(0);
size = SEMIHOSTING_HEAP_SIZE;
/* Try a big heap, and reduce the size if that fails. */
for (;;) {
ret = do_brk(base + size);
if (ret >= (base + size)) {
break;
}
size >>= 1;
}
ts->heap_limit = base + size;
}
/* This call may happen before we have writable memory, so return
values directly in registers. */
env->dregs[1] = ts->heap_limit;
env->aregs[7] = ts->stack_base;
}
#else
/* FIXME: This is wrong for boards where RAM does not start at
address zero. */
env->dregs[1] = ram_size;
env->aregs[7] = ram_size;
#endif
return;
default:
cpu_abort(CPU(m68k_env_get_cpu(env)), "Unsupported semihosting syscall %d\n", nr);
result = 0;
}
failed:
m68k_semi_return_u32(env, result, errno);
}

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/*
* M68K helper routines
*
* Copyright (c) 2007 CodeSourcery
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/semihost.h"
#if defined(CONFIG_USER_ONLY)
void m68k_cpu_do_interrupt(CPUState *cs)
{
cs->exception_index = -1;
}
static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
{
}
#else
/* Try to fill the TLB and return an exception if error. If retaddr is
NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */
void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr)
{
int ret;
ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret)) {
if (retaddr) {
/* now we have a real cpu fault */
cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
}
}
static void do_rte(CPUM68KState *env)
{
uint32_t sp;
uint32_t fmt;
sp = env->aregs[7];
fmt = cpu_ldl_kernel(env, sp);
env->pc = cpu_ldl_kernel(env, sp + 4);
sp |= (fmt >> 28) & 3;
env->aregs[7] = sp + 8;
helper_set_sr(env, fmt);
}
static void do_interrupt_all(CPUM68KState *env, int is_hw)
{
CPUState *cs = CPU(m68k_env_get_cpu(env));
uint32_t sp;
uint32_t fmt;
uint32_t retaddr;
uint32_t vector;
fmt = 0;
retaddr = env->pc;
if (!is_hw) {
switch (cs->exception_index) {
case EXCP_RTE:
/* Return from an exception. */
do_rte(env);
return;
case EXCP_HALT_INSN:
if (semihosting_enabled()
&& (env->sr & SR_S) != 0
&& (env->pc & 3) == 0
&& cpu_lduw_code(env, env->pc - 4) == 0x4e71
&& cpu_ldl_code(env, env->pc) == 0x4e7bf000) {
env->pc += 4;
do_m68k_semihosting(env, env->dregs[0]);
return;
}
cs->halted = 1;
cs->exception_index = EXCP_HLT;
cpu_loop_exit(cs);
return;
}
if (cs->exception_index >= EXCP_TRAP0
&& cs->exception_index <= EXCP_TRAP15) {
/* Move the PC after the trap instruction. */
retaddr += 2;
}
}
vector = cs->exception_index << 2;
fmt |= 0x40000000;
fmt |= vector << 16;
fmt |= env->sr;
fmt |= cpu_m68k_get_ccr(env);
env->sr |= SR_S;
if (is_hw) {
env->sr = (env->sr & ~SR_I) | (env->pending_level << SR_I_SHIFT);
env->sr &= ~SR_M;
}
m68k_switch_sp(env);
sp = env->aregs[7];
fmt |= (sp & 3) << 28;
/* ??? This could cause MMU faults. */
sp &= ~3;
sp -= 4;
cpu_stl_kernel(env, sp, retaddr);
sp -= 4;
cpu_stl_kernel(env, sp, fmt);
env->aregs[7] = sp;
/* Jump to vector. */
env->pc = cpu_ldl_kernel(env, env->vbr + vector);
}
void m68k_cpu_do_interrupt(CPUState *cs)
{
M68kCPU *cpu = M68K_CPU(cs);
CPUM68KState *env = &cpu->env;
do_interrupt_all(env, 0);
}
static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
{
do_interrupt_all(env, 1);
}
#endif
bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
M68kCPU *cpu = M68K_CPU(cs);
CPUM68KState *env = &cpu->env;
if (interrupt_request & CPU_INTERRUPT_HARD
&& ((env->sr & SR_I) >> SR_I_SHIFT) < env->pending_level) {
/* Real hardware gets the interrupt vector via an IACK cycle
at this point. Current emulated hardware doesn't rely on
this, so we provide/save the vector when the interrupt is
first signalled. */
cs->exception_index = env->pending_vector;
do_interrupt_m68k_hardirq(env);
return true;
}
return false;
}
static void raise_exception(CPUM68KState *env, int tt)
{
CPUState *cs = CPU(m68k_env_get_cpu(env));
cs->exception_index = tt;
cpu_loop_exit(cs);
}
void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)
{
raise_exception(env, tt);
}
void HELPER(divu)(CPUM68KState *env, uint32_t word)
{
uint32_t num;
uint32_t den;
uint32_t quot;
uint32_t rem;
num = env->div1;
den = env->div2;
/* ??? This needs to make sure the throwing location is accurate. */
if (den == 0) {
raise_exception(env, EXCP_DIV0);
}
quot = num / den;
rem = num % den;
env->cc_v = (word && quot > 0xffff ? -1 : 0);
env->cc_z = quot;
env->cc_n = quot;
env->cc_c = 0;
env->div1 = quot;
env->div2 = rem;
}
void HELPER(divs)(CPUM68KState *env, uint32_t word)
{
int32_t num;
int32_t den;
int32_t quot;
int32_t rem;
num = env->div1;
den = env->div2;
if (den == 0) {
raise_exception(env, EXCP_DIV0);
}
quot = num / den;
rem = num % den;
env->cc_v = (word && quot != (int16_t)quot ? -1 : 0);
env->cc_z = quot;
env->cc_n = quot;
env->cc_c = 0;
env->div1 = quot;
env->div2 = rem;
}

13
target/m68k/qregs.def Normal file
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@ -0,0 +1,13 @@
DEFF64(FP_RESULT, fp_result)
DEFO32(PC, pc)
DEFO32(SR, sr)
DEFO32(CC_OP, cc_op)
DEFO32(CC_X, cc_x)
DEFO32(CC_C, cc_c)
DEFO32(CC_N, cc_n)
DEFO32(CC_V, cc_v)
DEFO32(CC_Z, cc_z)
DEFO32(DIV1, div1)
DEFO32(DIV2, div2)
DEFO32(MACSR, macsr)
DEFO32(MAC_MASK, mac_mask)

3595
target/m68k/translate.c Normal file
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