mirror of
https://github.com/Motorhead1991/qemu.git
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ppc patch queue 2021-07-09
Here's a (probably) final pull request before the qemu-6.1 soft freeze. Includes: * Implementation of the new H_RPT_INVALIDATE hypercall * Virtual Open Firmware for pSeries and pegasos2 machine types. This is an experimental minimal Open Firmware implementation which works by delegating nearly everything to qemu itself via a special hypercall. * A number of cleanups to the ppc soft MMU code * Fix to handling of two-level radix mode translations for the powernv machine type * Update the H_GET_CPU_CHARACTERISTICS call with newly defined bits. This will allow more flexible handling of possible future CPU Spectre-like flaws * Correctly treat mtmsrd as an illegal instruction on BookE cpus * Firmware update for the ppce500 machine type -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEdfRlhq5hpmzETofcbDjKyiDZs5IFAmDn27oACgkQbDjKyiDZ s5I3eRAA2q76JMP1wH/orAS4gwgJVKxpdQ8F29xgtUnmL1w5RlVs2E0gXSEHYdt2 8rwmxtaz2iCzvc3hv6jZMjFz6A+otrEPFUqlE030mruxQDj2JXFnNLQP2dir3ZPg Nn0K2U+ChSr2MXjSyUzbB0vQJSVyLxFmR43MsyCbeHSxq2kfSuZ2dNfclzUJ0IXD 8QtCnjZrnOLHtaJ2Vkr/11Yb7rFmbDVZkA1c/ljE3NHGiYjWyZBgSG/Mk/SLeEZe 7wVblUFKZtuiqGCyg2BBAnoWJXPDzDO/ZHFsn5NeUf2d5KTgoeKO3MYfVKQLv3d2 W8JdI09S1OL6g1XEMWvm80S8NPCi0YxUGBXCJaKnuofiU+qwzBMUoj7Xk/2gheT3 uWZCSATUWiKLmOzksR4PbKmHCG9J1EiEMLma7IoNuVw6+pLwMgurM3hlYZtrXGSh 35oBsUT5fMkAM3BtkKh/ZKOfvKfgb1M5FmickI9O0L9BXbzPrmXre5fENhI0ROVs JeKNPjk/QUG1ftEMqpoYms+JR1rUiUN+jQBh+sFfJTi3CJFAbomoPitV6iGGPWZR sbDCRqkOyqZ9fR3hEXHzO+ThhwoI2xJPIs6+3/8XbVnFd74siqxOornWJZPpKjcf CSuOL2n81KJab8h/ERnb9QmJJWb9IJGv6YgZ5E4EFARDWvdSE3c= =9cX3 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210709' into staging ppc patch queue 2021-07-09 Here's a (probably) final pull request before the qemu-6.1 soft freeze. Includes: * Implementation of the new H_RPT_INVALIDATE hypercall * Virtual Open Firmware for pSeries and pegasos2 machine types. This is an experimental minimal Open Firmware implementation which works by delegating nearly everything to qemu itself via a special hypercall. * A number of cleanups to the ppc soft MMU code * Fix to handling of two-level radix mode translations for the powernv machine type * Update the H_GET_CPU_CHARACTERISTICS call with newly defined bits. This will allow more flexible handling of possible future CPU Spectre-like flaws * Correctly treat mtmsrd as an illegal instruction on BookE cpus * Firmware update for the ppce500 machine type # gpg: Signature made Fri 09 Jul 2021 06:16:42 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.1-20210709: (33 commits) target/ppc: Support for H_RPT_INVALIDATE hcall linux-headers: Update spapr: Fix implementation of Open Firmware client interface target/ppc: Don't compile ppc_tlb_invalid_all without TCG ppc/pegasos2: Implement some RTAS functions with VOF ppc/pegasos2: Fix use of && instead of & ppc/pegasos2: Use Virtual Open Firmware as firmware replacement target/ppc/spapr: Update H_GET_CPU_CHARACTERISTICS L1D cache flush bits target/ppc: Allow virtual hypervisor on CPU without HV ppc/pegasos2: Introduce Pegasos2MachineState structure target/ppc: mtmsrd is an illegal instruction on BookE spapr: Implement Open Firmware client interface docs/system: ppc: Update ppce500 documentation with eTSEC support roms/u-boot: Bump ppce500 u-boot to v2021.07 to add eTSEC support target/ppc: change ppc_hash32_xlate to use mmu_idx target/ppc: introduce mmu-books.h target/ppc: changed ppc_hash64_xlate to use mmu_idx target/ppc: fix address translation bug for radix mmus target/ppc: Fix compilation with DEBUG_BATS debug option target/ppc: Fix compilation with FLUSH_ALL_TLBS debug option ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
fc32b91a88
70 changed files with 3257 additions and 604 deletions
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@ -12,6 +12,7 @@
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#include "hw/ppc/spapr_xive.h" /* For SpaprXive */
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#include "hw/ppc/xics.h" /* For ICSState */
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#include "hw/ppc/spapr_tpm_proxy.h"
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#include "hw/ppc/vof.h"
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struct SpaprVioBus;
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struct SpaprPhbState;
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@ -74,8 +75,10 @@ typedef enum {
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#define SPAPR_CAP_CCF_ASSIST 0x09
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/* Implements PAPR FWNMI option */
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#define SPAPR_CAP_FWNMI 0x0A
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/* Support H_RPT_INVALIDATE */
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#define SPAPR_CAP_RPT_INVALIDATE 0x0B
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/* Num Caps */
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#define SPAPR_CAP_NUM (SPAPR_CAP_FWNMI + 1)
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#define SPAPR_CAP_NUM (SPAPR_CAP_RPT_INVALIDATE + 1)
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/*
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* Capability Values
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@ -180,6 +183,7 @@ struct SpaprMachineState {
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uint64_t kernel_addr;
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uint32_t initrd_base;
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long initrd_size;
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Vof *vof;
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uint64_t rtc_offset; /* Now used only during incoming migration */
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struct PPCTimebase tb;
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bool has_graphics;
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@ -398,10 +402,13 @@ struct SpaprMachineState {
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#define H_CPU_CHAR_THR_RECONF_TRIG PPC_BIT(6)
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#define H_CPU_CHAR_CACHE_COUNT_DIS PPC_BIT(7)
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#define H_CPU_CHAR_BCCTR_FLUSH_ASSIST PPC_BIT(9)
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#define H_CPU_BEHAV_FAVOUR_SECURITY PPC_BIT(0)
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#define H_CPU_BEHAV_L1D_FLUSH_PR PPC_BIT(1)
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#define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR PPC_BIT(2)
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#define H_CPU_BEHAV_FLUSH_COUNT_CACHE PPC_BIT(5)
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#define H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY PPC_BIT(7)
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#define H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS PPC_BIT(8)
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/* Each control block has to be on a 4K boundary */
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#define H_CB_ALIGNMENT 4096
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@ -542,8 +549,9 @@ struct SpaprMachineState {
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#define H_SCM_UNBIND_MEM 0x3F0
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#define H_SCM_UNBIND_ALL 0x3FC
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#define H_SCM_HEALTH 0x400
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#define H_RPT_INVALIDATE 0x448
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#define MAX_HCALL_OPCODE H_SCM_HEALTH
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#define MAX_HCALL_OPCODE H_RPT_INVALIDATE
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/* The hcalls above are standardized in PAPR and implemented by pHyp
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* as well.
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@ -558,7 +566,9 @@ struct SpaprMachineState {
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/* Client Architecture support */
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#define KVMPPC_H_CAS (KVMPPC_HCALL_BASE + 0x2)
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#define KVMPPC_H_UPDATE_DT (KVMPPC_HCALL_BASE + 0x3)
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#define KVMPPC_HCALL_MAX KVMPPC_H_UPDATE_DT
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/* 0x4 was used for KVMPPC_H_UPDATE_PHANDLE in SLOF */
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#define KVMPPC_H_VOF_CLIENT (KVMPPC_HCALL_BASE + 0x5)
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#define KVMPPC_HCALL_MAX KVMPPC_H_VOF_CLIENT
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/*
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* The hcall range 0xEF00 to 0xEF80 is reserved for use in facilitating
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#define SPAPR_IS_PCI_LIOBN(liobn) (!!((liobn) & 0x80000000))
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#define SPAPR_PCI_DMA_WINDOW_NUM(liobn) ((liobn) & 0xff)
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#define RTAS_SIZE 2048
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#define RTAS_MIN_SIZE 20 /* hv_rtas_size in SLOF */
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#define RTAS_ERROR_LOG_MAX 2048
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/* Offset from rtas-base where error log is placed */
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extern const VMStateDescription vmstate_spapr_cap_large_decr;
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extern const VMStateDescription vmstate_spapr_cap_ccf_assist;
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extern const VMStateDescription vmstate_spapr_cap_fwnmi;
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extern const VMStateDescription vmstate_spapr_cap_rpt_invalidate;
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static inline uint8_t spapr_get_cap(SpaprMachineState *spapr, int cap)
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{
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void spapr_set_all_lpcrs(target_ulong value, target_ulong mask);
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hwaddr spapr_get_rtas_addr(void);
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bool spapr_memory_hot_unplug_supported(SpaprMachineState *spapr);
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void spapr_vof_reset(SpaprMachineState *spapr, void *fdt, Error **errp);
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void spapr_vof_quiesce(MachineState *ms);
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bool spapr_vof_setprop(MachineState *ms, const char *path, const char *propname,
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void *val, int vallen);
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target_ulong spapr_h_vof_client(PowerPCCPU *cpu, SpaprMachineState *spapr,
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target_ulong opcode, target_ulong *args);
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target_ulong spapr_vof_client_architecture_support(MachineState *ms,
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CPUState *cs,
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target_ulong ovec_addr);
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void spapr_vof_client_dt_finalize(SpaprMachineState *spapr, void *fdt);
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#endif /* HW_SPAPR_H */
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58
include/hw/ppc/vof.h
Normal file
58
include/hw/ppc/vof.h
Normal file
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/*
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* Virtual Open Firmware
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_VOF_H
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#define HW_VOF_H
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typedef struct Vof {
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uint64_t top_addr; /* copied from rma_size */
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GArray *claimed; /* array of SpaprOfClaimed */
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uint64_t claimed_base;
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GHashTable *of_instances; /* ihandle -> SpaprOfInstance */
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uint32_t of_instance_last;
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char *bootargs;
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long fw_size;
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} Vof;
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int vof_client_call(MachineState *ms, Vof *vof, void *fdt,
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target_ulong args_real);
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uint64_t vof_claim(Vof *vof, uint64_t virt, uint64_t size, uint64_t align);
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void vof_init(Vof *vof, uint64_t top_addr, Error **errp);
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void vof_cleanup(Vof *vof);
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void vof_build_dt(void *fdt, Vof *vof);
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uint32_t vof_client_open_store(void *fdt, Vof *vof, const char *nodename,
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const char *prop, const char *path);
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#define TYPE_VOF_MACHINE_IF "vof-machine-if"
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typedef struct VofMachineIfClass VofMachineIfClass;
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DECLARE_CLASS_CHECKERS(VofMachineIfClass, VOF_MACHINE, TYPE_VOF_MACHINE_IF)
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struct VofMachineIfClass {
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InterfaceClass parent;
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target_ulong (*client_architecture_support)(MachineState *ms, CPUState *cs,
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target_ulong vec);
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void (*quiesce)(MachineState *ms);
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bool (*setprop)(MachineState *ms, const char *path, const char *propname,
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void *val, int vallen);
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};
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/*
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* Initial stack size is from
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* https://www.devicetree.org/open-firmware/bindings/ppc/release/ppc-2_1.html#REF27292
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*
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* "Client programs shall be invoked with a valid stack pointer (r1) with
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* at least 32K bytes of memory available for stack growth".
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*/
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#define VOF_STACK_SIZE 0x8000
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#define VOF_MEM_READ(pa, buf, size) \
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address_space_read(&address_space_memory, \
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(pa), MEMTXATTRS_UNSPECIFIED, (buf), (size))
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#define VOF_MEM_WRITE(pa, buf, size) \
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address_space_write(&address_space_memory, \
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(pa), MEMTXATTRS_UNSPECIFIED, (buf), (size))
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#endif /* HW_VOF_H */
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@ -33,6 +33,8 @@
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#define KVM_FEATURE_PV_SCHED_YIELD 13
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#define KVM_FEATURE_ASYNC_PF_INT 14
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#define KVM_FEATURE_MSI_EXT_DEST_ID 15
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#define KVM_FEATURE_HC_MAP_GPA_RANGE 16
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#define KVM_FEATURE_MIGRATION_CONTROL 17
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#define KVM_HINTS_REALTIME 0
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#define MSR_KVM_POLL_CONTROL 0x4b564d05
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#define MSR_KVM_ASYNC_PF_INT 0x4b564d06
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#define MSR_KVM_ASYNC_PF_ACK 0x4b564d07
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#define MSR_KVM_MIGRATION_CONTROL 0x4b564d08
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struct kvm_steal_time {
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uint64_t steal;
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/* MSR_KVM_ASYNC_PF_INT */
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#define KVM_ASYNC_PF_VEC_MASK GENMASK(7, 0)
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/* MSR_KVM_MIGRATION_CONTROL */
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#define KVM_MIGRATION_READY (1 << 0)
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/* KVM_HC_MAP_GPA_RANGE */
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#define KVM_MAP_GPA_RANGE_PAGE_SZ_4K 0
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#define KVM_MAP_GPA_RANGE_PAGE_SZ_2M (1 << 0)
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#define KVM_MAP_GPA_RANGE_PAGE_SZ_1G (1 << 1)
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#define KVM_MAP_GPA_RANGE_ENC_STAT(n) (n << 4)
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#define KVM_MAP_GPA_RANGE_ENCRYPTED KVM_MAP_GPA_RANGE_ENC_STAT(1)
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#define KVM_MAP_GPA_RANGE_DECRYPTED KVM_MAP_GPA_RANGE_ENC_STAT(0)
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/* Operations for KVM_HC_MMU_OP */
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#define KVM_MMU_OP_WRITE_PTE 1
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@ -167,6 +167,13 @@ extern "C" {
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#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
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#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
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/* 64 bpp RGB */
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#define DRM_FORMAT_XRGB16161616 fourcc_code('X', 'R', '4', '8') /* [63:0] x:R:G:B 16:16:16:16 little endian */
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#define DRM_FORMAT_XBGR16161616 fourcc_code('X', 'B', '4', '8') /* [63:0] x:B:G:R 16:16:16:16 little endian */
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#define DRM_FORMAT_ARGB16161616 fourcc_code('A', 'R', '4', '8') /* [63:0] A:R:G:B 16:16:16:16 little endian */
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#define DRM_FORMAT_ABGR16161616 fourcc_code('A', 'B', '4', '8') /* [63:0] A:B:G:R 16:16:16:16 little endian */
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/*
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* Floating point 64bpp RGB
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* IEEE 754-2008 binary16 half-precision float
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@ -233,7 +233,7 @@ enum tunable_id {
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ETHTOOL_PFC_PREVENTION_TOUT, /* timeout in msecs */
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/*
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* Add your fresh new tunable attribute above and remember to update
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* tunable_strings[] in net/core/ethtool.c
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* tunable_strings[] in net/ethtool/common.c
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*/
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__ETHTOOL_TUNABLE_COUNT,
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};
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ETHTOOL_PHY_EDPD,
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/*
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* Add your fresh new phy tunable attribute above and remember to update
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* phy_tunable_strings[] in net/core/ethtool.c
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* phy_tunable_strings[] in net/ethtool/common.c
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*/
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__ETHTOOL_PHY_TUNABLE_COUNT,
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};
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@ -611,6 +611,7 @@
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#define KEY_VOICECOMMAND 0x246 /* Listening Voice Command */
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#define KEY_ASSISTANT 0x247 /* AL Context-aware desktop assistant */
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#define KEY_KBD_LAYOUT_NEXT 0x248 /* AC Next Keyboard Layout Select */
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#define KEY_EMOJI_PICKER 0x249 /* Show/hide emoji picker (HUTRR101) */
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#define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */
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#define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */
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@ -54,7 +54,7 @@
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#define VIRTIO_ID_SOUND 25 /* virtio sound */
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#define VIRTIO_ID_FS 26 /* virtio filesystem */
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#define VIRTIO_ID_PMEM 27 /* virtio pmem */
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#define VIRTIO_ID_BT 28 /* virtio bluetooth */
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#define VIRTIO_ID_MAC80211_HWSIM 29 /* virtio mac80211-hwsim */
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#define VIRTIO_ID_BT 40 /* virtio bluetooth */
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#endif /* _LINUX_VIRTIO_IDS_H */
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@ -38,6 +38,9 @@
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#include "standard-headers/linux/virtio_ids.h"
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#include "standard-headers/linux/virtio_config.h"
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/* The feature bitmap for virtio vsock */
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#define VIRTIO_VSOCK_F_SEQPACKET 1 /* SOCK_SEQPACKET supported */
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struct virtio_vsock_config {
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uint64_t guest_cid;
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} QEMU_PACKED;
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@ -65,6 +68,7 @@ struct virtio_vsock_hdr {
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enum virtio_vsock_type {
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VIRTIO_VSOCK_TYPE_STREAM = 1,
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VIRTIO_VSOCK_TYPE_SEQPACKET = 2,
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};
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enum virtio_vsock_op {
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@ -91,4 +95,9 @@ enum virtio_vsock_shutdown {
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VIRTIO_VSOCK_SHUTDOWN_SEND = 2,
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};
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/* VIRTIO_VSOCK_OP_RW flags values */
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enum virtio_vsock_rw {
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VIRTIO_VSOCK_SEQ_EOR = 1,
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};
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#endif /* _LINUX_VIRTIO_VSOCK_H */
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