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target/riscv: add 'rva22u64' CPU
This CPU was suggested by Alistair [1] and others during the profile design discussions. It consists of the bare 'rv64i' CPU with rva22u64 enabled by default, like an alias of '-cpu rv64i,rva22u64=true'. Users now have an even easier way of consuming this user-mode profile by doing '-cpu rva22u64'. Extensions can be enabled/disabled at will on top of it. We can boot Linux with this "user-mode" CPU by doing: -cpu rva22u64,sv39=true,s=true,zifencei=true [1] https://lore.kernel.org/qemu-riscv/CAKmqyKP7xzZ9Sx=-Lbx2Ob0qCfB7Z+JO944FQ2TQ+49mqo0q_Q@mail.gmail.com/ Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20231218125334.37184-19-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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3 changed files with 27 additions and 0 deletions
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@ -1575,6 +1575,15 @@ static Property riscv_cpu_properties[] = {
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DEFINE_PROP_END_OF_LIST(),
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};
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#if defined(TARGET_RISCV64)
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static void rva22u64_profile_cpu_init(Object *obj)
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{
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rv64i_bare_cpu_init(obj);
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RVA22U64.enabled = true;
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}
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#endif
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static const gchar *riscv_gdb_arch_name(CPUState *cs)
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{
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RISCVCPU *cpu = RISCV_CPU(cs);
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@ -1836,6 +1845,13 @@ char *riscv_isa_string(RISCVCPU *cpu)
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.instance_init = initfn \
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}
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#define DEFINE_PROFILE_CPU(type_name, initfn) \
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{ \
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.name = type_name, \
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.parent = TYPE_RISCV_BARE_CPU, \
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.instance_init = initfn \
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}
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static const TypeInfo riscv_cpu_type_infos[] = {
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{
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.name = TYPE_RISCV_CPU,
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@ -1880,6 +1896,7 @@ static const TypeInfo riscv_cpu_type_infos[] = {
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DEFINE_VENDOR_CPU(TYPE_RISCV_CPU_VEYRON_V1, rv64_veyron_v1_cpu_init),
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DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_BASE128, rv128_base_cpu_init),
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DEFINE_BARE_CPU(TYPE_RISCV_CPU_RV64I, rv64i_bare_cpu_init),
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DEFINE_PROFILE_CPU(TYPE_RISCV_CPU_RVA22U64, rva22u64_profile_cpu_init),
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#endif
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};
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