motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 00:03:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

hw/riscv/virt.c: remove trivial virt_memmap references

Browse source 
We should use s->memmap instead of virt_memmap to be able to use an
updated memmap when we start versioning the board.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250429125811.224803-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2025-04-29 09:58:04 -03:00 • committed by Alistair Francis
parent 221e96cb7a
commit fb8cf3fd98
1 changed files with 14 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

29
hw/riscv/virt.c
View file

@ -166,8 +166,8 @@ static void virt_flash_map1(PFlashCFI01 *flash,
static void virt_flash_map(RISCVVirtState *s, static void virt_flash_map(RISCVVirtState *s,
MemoryRegion *sysmem) MemoryRegion *sysmem)
{ {
hwaddr flashsize = virt_memmap[VIRT_FLASH].size / 2; hwaddr flashsize = s->memmap[VIRT_FLASH].size / 2;
hwaddr flashbase = virt_memmap[VIRT_FLASH].base; hwaddr flashbase = s->memmap[VIRT_FLASH].base;
virt_flash_map1(s->flash[0], flashbase, flashsize, virt_flash_map1(s->flash[0], flashbase, flashsize,
sysmem); sysmem);
@ -999,8 +999,8 @@ static void create_fdt_rtc(RISCVVirtState *s, const MemMapEntry *memmap,
static void create_fdt_flash(RISCVVirtState *s, const MemMapEntry *memmap) static void create_fdt_flash(RISCVVirtState *s, const MemMapEntry *memmap)
{ {
MachineState *ms = MACHINE(s); MachineState *ms = MACHINE(s);
hwaddr flashsize = virt_memmap[VIRT_FLASH].size / 2; hwaddr flashsize = s->memmap[VIRT_FLASH].size / 2;
hwaddr flashbase = virt_memmap[VIRT_FLASH].base; hwaddr flashbase = s->memmap[VIRT_FLASH].base;
g_autofree char *name = g_strdup_printf("/flash@%" PRIx64, flashbase); g_autofree char *name = g_strdup_printf("/flash@%" PRIx64, flashbase);
qemu_fdt_add_subnode(ms->fdt, name); qemu_fdt_add_subnode(ms->fdt, name);
@ -1035,7 +1035,7 @@ static void create_fdt_virtio_iommu(RISCVVirtState *s, uint16_t bdf)
g_autofree char *pci_node = NULL; g_autofree char *pci_node = NULL;
pci_node = g_strdup_printf("/soc/pci@%lx", pci_node = g_strdup_printf("/soc/pci@%lx",
(long) virt_memmap[VIRT_PCIE_ECAM].base); (long) s->memmap[VIRT_PCIE_ECAM].base);
iommu_node = g_strdup_printf("%s/virtio_iommu@%x,%x", pci_node, iommu_node = g_strdup_printf("%s/virtio_iommu@%x,%x", pci_node,
PCI_SLOT(bdf), PCI_FUNC(bdf)); PCI_SLOT(bdf), PCI_FUNC(bdf));
iommu_phandle = qemu_fdt_alloc_phandle(fdt); iommu_phandle = qemu_fdt_alloc_phandle(fdt);
@ -1104,7 +1104,7 @@ static void create_fdt_iommu(RISCVVirtState *s, uint16_t bdf)
g_autofree char *pci_node = NULL; g_autofree char *pci_node = NULL;
pci_node = g_strdup_printf("/soc/pci@%lx", pci_node = g_strdup_printf("/soc/pci@%lx",
(long) virt_memmap[VIRT_PCIE_ECAM].base); (long) s->memmap[VIRT_PCIE_ECAM].base);
iommu_node = g_strdup_printf("%s/iommu@%x", pci_node, bdf); iommu_node = g_strdup_printf("%s/iommu@%x", pci_node, bdf);
iommu_phandle = qemu_fdt_alloc_phandle(fdt); iommu_phandle = qemu_fdt_alloc_phandle(fdt);
qemu_fdt_add_subnode(fdt, iommu_node); qemu_fdt_add_subnode(fdt, iommu_node);
@ -1126,24 +1126,24 @@ static void finalize_fdt(RISCVVirtState *s)
uint32_t irq_pcie_phandle = 1, irq_virtio_phandle = 1; uint32_t irq_pcie_phandle = 1, irq_virtio_phandle = 1;
uint32_t iommu_sys_phandle = 1; uint32_t iommu_sys_phandle = 1;
create_fdt_sockets(s, virt_memmap, &phandle, &irq_mmio_phandle, create_fdt_sockets(s, s->memmap, &phandle, &irq_mmio_phandle,
&irq_pcie_phandle, &irq_virtio_phandle, &irq_pcie_phandle, &irq_virtio_phandle,
&msi_pcie_phandle); &msi_pcie_phandle);
create_fdt_virtio(s, virt_memmap, irq_virtio_phandle); create_fdt_virtio(s, s->memmap, irq_virtio_phandle);
if (virt_is_iommu_sys_enabled(s)) { if (virt_is_iommu_sys_enabled(s)) {
create_fdt_iommu_sys(s, irq_mmio_phandle, msi_pcie_phandle, create_fdt_iommu_sys(s, irq_mmio_phandle, msi_pcie_phandle,
&iommu_sys_phandle); &iommu_sys_phandle);
} }
create_fdt_pcie(s, virt_memmap, irq_pcie_phandle, msi_pcie_phandle, create_fdt_pcie(s, s->memmap, irq_pcie_phandle, msi_pcie_phandle,
iommu_sys_phandle); iommu_sys_phandle);
create_fdt_reset(s, virt_memmap, &phandle); create_fdt_reset(s, s->memmap, &phandle);
create_fdt_uart(s, virt_memmap, irq_mmio_phandle); create_fdt_uart(s, s->memmap, irq_mmio_phandle);
create_fdt_rtc(s, virt_memmap, irq_mmio_phandle); create_fdt_rtc(s, s->memmap, irq_mmio_phandle);
} }
static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap) static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap)
@ -1361,14 +1361,13 @@ static void create_platform_bus(RISCVVirtState *s, DeviceState *irqchip)
{ {
DeviceState *dev; DeviceState *dev;
SysBusDevice *sysbus; SysBusDevice *sysbus;
const MemMapEntry *memmap = virt_memmap;
int i; int i;
MemoryRegion *sysmem = get_system_memory(); MemoryRegion *sysmem = get_system_memory();
dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE); dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE);
dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE); dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE);
qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS); qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS);
qdev_prop_set_uint32(dev, "mmio_size", memmap[VIRT_PLATFORM_BUS].size); qdev_prop_set_uint32(dev, "mmio_size", s->memmap[VIRT_PLATFORM_BUS].size);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
s->platform_bus_dev = dev; s->platform_bus_dev = dev;
@ -1379,7 +1378,7 @@ static void create_platform_bus(RISCVVirtState *s, DeviceState *irqchip)
} }
memory_region_add_subregion(sysmem, memory_region_add_subregion(sysmem,
memmap[VIRT_PLATFORM_BUS].base, s->memmap[VIRT_PLATFORM_BUS].base,
sysbus_mmio_get_region(sysbus, 0)); sysbus_mmio_get_region(sysbus, 0));
} }