mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-07-27 12:23:53 -06:00
aspeed/timer: Add support for IRQ status register on the AST2600
The AST2600 timer replaces control register 2 with a interrupt status register. It is set by hardware when an IRQ occurs and cleared by software. Modify the vmstate version to take into account the new fields. Based on previous work from Joel Stanley. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190925143248.10000-8-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
c20375dd86
commit
fadefada4d
2 changed files with 29 additions and 8 deletions
|
@ -60,6 +60,7 @@ typedef struct AspeedTimerCtrlState {
|
|||
uint32_t ctrl;
|
||||
uint32_t ctrl2;
|
||||
uint32_t ctrl3;
|
||||
uint32_t irq_sts;
|
||||
AspeedTimer timers[ASPEED_TIMER_NR_TIMERS];
|
||||
|
||||
AspeedSCUState *scu;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue