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target/arm: Add coproc parameter to syn_fp_access_trap

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With ARMv8, this field is always RES0.
With ARMv7, targeting EL2 and TA=0, it is always 0xA.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220609202901.1177572-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-06-10 14:32:30 +01:00 • committed by Peter Maydell
parent 7666a81d15
commit fa33eead86
3 changed files with 18 additions and 6 deletions
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7
target/arm/syndrome.h
View file

@ -185,12 +185,13 @@ static inline uint32_t syn_cp15_rrt_trap(int cv, int cond, int opc1, int crm,
| (rt2 << 10) | (rt << 5) | (crm << 1) | isread; | (rt2 << 10) | (rt << 5) | (crm << 1) | isread;
} }
static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_16bit) static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_16bit,
int coproc)
{ {
/* AArch32 FP trap or any AArch64 FP/SIMD trap: TA == 0 coproc == 0xa */ /* AArch32 FP trap or any AArch64 FP/SIMD trap: TA == 0 */
return (EC_ADVSIMDFPACCESSTRAP << ARM_EL_EC_SHIFT) return (EC_ADVSIMDFPACCESSTRAP << ARM_EL_EC_SHIFT)
| (is_16bit ? 0 : ARM_EL_IL) | (is_16bit ? 0 : ARM_EL_IL)
| (cv << 24) | (cond << 20) | 0xa; | (cv << 24) | (cond << 20) | coproc;
} }
static inline uint32_t syn_simd_access_trap(int cv, int cond, bool is_16bit) static inline uint32_t syn_simd_access_trap(int cv, int cond, bool is_16bit)

3
target/arm/translate-a64.c
View file

@ -1162,7 +1162,8 @@ static bool fp_access_check(DisasContext *s)
s->fp_access_checked = true; s->fp_access_checked = true;
gen_exception_insn(s, s->pc_curr, EXCP_UDEF, gen_exception_insn(s, s->pc_curr, EXCP_UDEF,
syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); syn_fp_access_trap(1, 0xe, false, 0),
s->fp_excp_el);
return false; return false;
} }
s->fp_access_checked = true; s->fp_access_checked = true;

14
target/arm/translate-vfp.c
View file

@ -219,8 +219,18 @@ static void gen_update_fp_context(DisasContext *s)
static bool vfp_access_check_a(DisasContext *s, bool ignore_vfp_enabled) static bool vfp_access_check_a(DisasContext *s, bool ignore_vfp_enabled)
{ {
if (s->fp_excp_el) { if (s->fp_excp_el) {
gen_exception_insn(s, s->pc_curr, EXCP_UDEF, /*
syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); * The full syndrome is only used for HSR when HCPTR traps:
* For v8, when TA==0, coproc is RES0.
* For v7, any use of a Floating-point instruction or access
* to a Floating-point Extension register that is trapped to
* Hyp mode because of a trap configured in the HCPTR sets
* this field to 0xA.
*/
int coproc = arm_dc_feature(s, ARM_FEATURE_V8) ? 0 : 0xa;
uint32_t syn = syn_fp_access_trap(1, 0xe, false, coproc);
gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn, s->fp_excp_el);
return false; return false;
} }