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RISC-V: Adding XTheadBs ISA extension

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This patch adds support for the XTheadBs ISA extension.
The patch uses the T-Head specific decoder and translation.

Co-developed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230131202013.2541053-6-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Christoph Müllner 2023-01-31 21:20:04 +01:00 • committed by Alistair Francis
parent 426c049196
commit fa13458546
5 changed files with 23 additions and 1 deletions
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15
target/riscv/insn_trans/trans_xthead.c.inc
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@ -28,6 +28,12 @@
} \
} while (0)
#define REQUIRE_XTHEADBS(ctx) do { \
if (!ctx->cfg_ptr->ext_xtheadbs) { \
return false; \
} \
} while (0)
#define REQUIRE_XTHEADCMO(ctx) do { \
if (!ctx->cfg_ptr->ext_xtheadcmo) { \
return false; \
@ -191,6 +197,15 @@ static bool trans_th_tstnbz(DisasContext *ctx, arg_th_tstnbz *a)
return gen_unary(ctx, a, EXT_ZERO, gen_th_tstnbz);
}
/* XTheadBs */
/* th.tst is an alternate encoding for bexti (from Zbs) */
static bool trans_th_tst(DisasContext *ctx, arg_th_tst *a)
{
REQUIRE_XTHEADBS(ctx);
return gen_shift_imm_tl(ctx, a, EXT_NONE, gen_bext);
}
/* XTheadCmo */
static inline int priv_level(DisasContext *ctx)