hw/arm/bcm2836: Split out common part of BCM283X classes

Pre setup for BCM2838 introduction

Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240226000259.2752893-2-sergey.kambalin@auriga.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Sergey Kambalin 2024-02-25 18:02:19 -06:00 committed by Peter Maydell
parent a365572b9c
commit f932093ae1
3 changed files with 84 additions and 47 deletions

View file

@ -17,8 +17,10 @@
#include "target/arm/cpu.h"
#include "qom/object.h"
#define TYPE_BCM283X_BASE "bcm283x-base"
OBJECT_DECLARE_TYPE(BCM283XBaseState, BCM283XBaseClass, BCM283X_BASE)
#define TYPE_BCM283X "bcm283x"
OBJECT_DECLARE_TYPE(BCM283XState, BCM283XClass, BCM283X)
OBJECT_DECLARE_SIMPLE_TYPE(BCM283XState, BCM283X)
#define BCM283X_NCPUS 4
@ -30,7 +32,7 @@ OBJECT_DECLARE_TYPE(BCM283XState, BCM283XClass, BCM283X)
#define TYPE_BCM2836 "bcm2836"
#define TYPE_BCM2837 "bcm2837"
struct BCM283XState {
struct BCM283XBaseState {
/*< private >*/
DeviceState parent_obj;
/*< public >*/
@ -41,7 +43,27 @@ struct BCM283XState {
ARMCPU core;
} cpu[BCM283X_NCPUS];
BCM2836ControlState control;
};
struct BCM283XBaseClass {
/*< private >*/
DeviceClass parent_class;
/*< public >*/
const char *name;
const char *cpu_type;
unsigned core_count;
hwaddr peri_base; /* Peripheral base address seen by the CPU */
hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
int clusterid;
};
struct BCM283XState {
/*< private >*/
BCM283XBaseState parent_obj;
/*< public >*/
BCM2835PeripheralState peripherals;
};
bool bcm283x_common_realize(DeviceState *dev, Error **errp);
#endif /* BCM2836_H */