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target/riscv: Only support a single VSXL length

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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: f3f4fd2ec22a07cc1d750e96895d6813f131de4d.1597259519.git.alistair.francis@wdc.com
Message-Id: <f3f4fd2ec22a07cc1d750e96895d6813f131de4d.1597259519.git.alistair.francis@wdc.com>
This commit is contained in:
Alistair Francis 2020-08-12 12:13:38 -07:00
parent 543ba53157
commit f8dc878efc
1 changed files with 9 additions and 0 deletions
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9
target/riscv/csr.c
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@ -836,12 +836,21 @@ static int write_satp(CPURISCVState *env, int csrno, target_ulong val)
static int read_hstatus(CPURISCVState *env, int csrno, target_ulong *val) static int read_hstatus(CPURISCVState *env, int csrno, target_ulong *val)
{ {
*val = env->hstatus; *val = env->hstatus;
#ifdef TARGET_RISCV64
/* We only support 64-bit VSXL */
*val = set_field(*val, HSTATUS_VSXL, 2);
#endif
return 0; return 0;
} }
static int write_hstatus(CPURISCVState *env, int csrno, target_ulong val) static int write_hstatus(CPURISCVState *env, int csrno, target_ulong val)
{ {
env->hstatus = val; env->hstatus = val;
#ifdef TARGET_RISCV64
if (get_field(val, HSTATUS_VSXL) != 2) {
qemu_log_mask(LOG_UNIMP, "QEMU does not support mixed HSXLEN options.");
}
#endif
return 0; return 0;
} }