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target/sh4: Use cmpxchg for movco when parallel_cpus
As for other targets, cmpxchg isn't quite right for ll/sc, suffering from an ABA race, but is sufficient to implement portable atomic operations. Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170907185057.23421-2-richard.henderson@linaro.org> [aurel32: fix whitespace] Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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4 changed files with 79 additions and 27 deletions
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@ -188,7 +188,9 @@ typedef struct CPUSH4State {
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tlb_t itlb[ITLB_SIZE]; /* instruction translation table */
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tlb_t utlb[UTLB_SIZE]; /* unified translation table */
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uint32_t ldst;
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/* LDST = LOCK_ADDR != -1. */
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uint32_t lock_addr;
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uint32_t lock_value;
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/* Fields up to this point are cleared by a CPU reset */
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struct {} end_reset_fields;
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