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target/sh4: Use cmpxchg for movco when parallel_cpus

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As for other targets, cmpxchg isn't quite right for ll/sc,
suffering from an ABA race, but is sufficient to implement
portable atomic operations.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20170907185057.23421-2-richard.henderson@linaro.org>
[aurel32: fix whitespace]
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2017-09-07 11:50:53 -07:00 • committed by Aurelien Jarno
parent 6d56fc6cc3
commit f85da3081d
4 changed files with 79 additions and 27 deletions
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19
linux-user/main.c
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@ -2679,6 +2679,8 @@ void cpu_loop(CPUSH4State *env)
target_siginfo_t info;
while (1) {
bool arch_interrupt = true;
cpu_exec_start(cs);
trapnr = cpu_exec(cs);
cpu_exec_end(cs);
@ -2710,13 +2712,14 @@ void cpu_loop(CPUSH4State *env)
int sig;
sig = gdb_handlesig(cs, TARGET_SIGTRAP);
if (sig)
{
if (sig) {
info.si_signo = sig;
info.si_errno = 0;
info.si_code = TARGET_TRAP_BRKPT;
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
}
} else {
arch_interrupt = false;
}
}
break;
case 0xa0:
@ -2727,9 +2730,9 @@ void cpu_loop(CPUSH4State *env)
info._sifields._sigfault._addr = env->tea;
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
arch_interrupt = false;
break;
default:
printf ("Unhandled trap: 0x%x\n", trapnr);
@ -2737,6 +2740,14 @@ void cpu_loop(CPUSH4State *env)
exit(EXIT_FAILURE);
}
process_pending_signals (env);
/* Most of the traps imply an exception or interrupt, which
implies an REI instruction has been executed. Which means
that LDST (aka LOK_ADDR) should be cleared. But there are
a few exceptions for traps internal to QEMU. */
if (arch_interrupt) {
env->lock_addr = -1;
}
}
}
#endif