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More helper types, rearrange generic definitions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3988 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files with 109 additions and 64 deletions
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@ -57,70 +57,6 @@
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//#define MACRO_TEST 1
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#ifdef TARGET_X86_64
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#define TCG_TYPE_TL TCG_TYPE_I64
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#define tcg_gen_movi_tl tcg_gen_movi_i64
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#define tcg_gen_mov_tl tcg_gen_mov_i64
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#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
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#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
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#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
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#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
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#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
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#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
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#define tcg_gen_ld_tl tcg_gen_ld_i64
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#define tcg_gen_st8_tl tcg_gen_st8_i64
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#define tcg_gen_st16_tl tcg_gen_st16_i64
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#define tcg_gen_st32_tl tcg_gen_st32_i64
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#define tcg_gen_st_tl tcg_gen_st_i64
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#define tcg_gen_add_tl tcg_gen_add_i64
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#define tcg_gen_addi_tl tcg_gen_addi_i64
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#define tcg_gen_sub_tl tcg_gen_sub_i64
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#define tcg_gen_subi_tl tcg_gen_subi_i64
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#define tcg_gen_and_tl tcg_gen_and_i64
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#define tcg_gen_andi_tl tcg_gen_andi_i64
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#define tcg_gen_or_tl tcg_gen_or_i64
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#define tcg_gen_ori_tl tcg_gen_ori_i64
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#define tcg_gen_xor_tl tcg_gen_xor_i64
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#define tcg_gen_xori_tl tcg_gen_xori_i64
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#define tcg_gen_shl_tl tcg_gen_shl_i64
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#define tcg_gen_shli_tl tcg_gen_shli_i64
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#define tcg_gen_shr_tl tcg_gen_shr_i64
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#define tcg_gen_shri_tl tcg_gen_shri_i64
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#define tcg_gen_sar_tl tcg_gen_sar_i64
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#define tcg_gen_sari_tl tcg_gen_sari_i64
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#else
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#define TCG_TYPE_TL TCG_TYPE_I32
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#define tcg_gen_movi_tl tcg_gen_movi_i32
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#define tcg_gen_mov_tl tcg_gen_mov_i32
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#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
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#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
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#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
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#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
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#define tcg_gen_ld32u_tl tcg_gen_ld_i32
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#define tcg_gen_ld32s_tl tcg_gen_ld_i32
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#define tcg_gen_ld_tl tcg_gen_ld_i32
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#define tcg_gen_st8_tl tcg_gen_st8_i32
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#define tcg_gen_st16_tl tcg_gen_st16_i32
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#define tcg_gen_st32_tl tcg_gen_st_i32
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#define tcg_gen_st_tl tcg_gen_st_i32
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#define tcg_gen_add_tl tcg_gen_add_i32
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#define tcg_gen_addi_tl tcg_gen_addi_i32
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#define tcg_gen_sub_tl tcg_gen_sub_i32
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#define tcg_gen_subi_tl tcg_gen_subi_i32
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#define tcg_gen_and_tl tcg_gen_and_i32
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#define tcg_gen_andi_tl tcg_gen_andi_i32
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#define tcg_gen_or_tl tcg_gen_or_i32
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#define tcg_gen_ori_tl tcg_gen_ori_i32
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#define tcg_gen_xor_tl tcg_gen_xor_i32
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#define tcg_gen_xori_tl tcg_gen_xori_i32
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#define tcg_gen_shl_tl tcg_gen_shl_i32
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#define tcg_gen_shli_tl tcg_gen_shli_i32
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#define tcg_gen_shr_tl tcg_gen_shr_i32
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#define tcg_gen_shri_tl tcg_gen_shri_i32
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#define tcg_gen_sar_tl tcg_gen_sar_i32
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#define tcg_gen_sari_tl tcg_gen_sari_i32
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#endif
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/* global register indexes */
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static TCGv cpu_env, cpu_T[2], cpu_A0;
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/* local register indexes (only used inside old micro ops) */
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