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target/arm: ensure we use current exception state after SCR update
A write to the SCR can change the effective EL by droppping the system from secure to non-secure mode. However if we use a cached current_el from before the change we'll rebuild the flags incorrectly. To fix this we introduce the ARM_CP_NEWEL CP flag to indicate the new EL should be used when recomputing the flags. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20191212114734.6962-1-alex.bennee@linaro.org Cc: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20191209143723.6368-1-alex.bennee@linaro.org> Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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4 changed files with 25 additions and 4 deletions
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@ -5133,7 +5133,7 @@ static const ARMCPRegInfo el3_cp_reginfo[] = {
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.opc0 = 3, .opc1 = 6, .crn = 1, .crm = 1, .opc2 = 0,
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.access = PL3_RW, .fieldoffset = offsetof(CPUARMState, cp15.scr_el3),
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.resetvalue = 0, .writefn = scr_write },
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{ .name = "SCR", .type = ARM_CP_ALIAS,
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{ .name = "SCR", .type = ARM_CP_ALIAS | ARM_CP_NEWEL,
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.cp = 15, .opc1 = 0, .crn = 1, .crm = 1, .opc2 = 0,
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.access = PL1_RW, .accessfn = access_trap_aa32s_el1,
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.fieldoffset = offsetoflow32(CPUARMState, cp15.scr_el3),
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@ -11472,6 +11472,18 @@ void HELPER(rebuild_hflags_m32)(CPUARMState *env, int el)
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env->hflags = rebuild_hflags_m32(env, fp_el, mmu_idx);
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}
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/*
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* If we have triggered a EL state change we can't rely on the
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* translator having passed it too us, we need to recompute.
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*/
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void HELPER(rebuild_hflags_a32_newel)(CPUARMState *env)
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{
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int el = arm_current_el(env);
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int fp_el = fp_exception_el(env, el);
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ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el);
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env->hflags = rebuild_hflags_a32(env, fp_el, mmu_idx);
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}
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void HELPER(rebuild_hflags_a32)(CPUARMState *env, int el)
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{
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int fp_el = fp_exception_el(env, el);
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