motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-02 23:33:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/arm: Implement ID_AA64MMFR3_EL1

Browse source 
Newer versions of the Arm ARM (e.g.  rev K.a) now define fields for
ID_AA64MMFR3_EL1.  Implement this register, so that we can set the
fields if we need to.  There's no behaviour change here since we
don't currently set the register value to non-zero.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240418152004.2106516-5-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-04-18 16:20:03 +01:00
parent 74360f3544
commit f7ddd7b6a1
4 changed files with 25 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target/arm/kvm.c
View file

@ -331,6 +331,8 @@ static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
ARM64_SYS_REG(3, 0, 0, 7, 1));
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr2,
ARM64_SYS_REG(3, 0, 0, 7, 2));
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr3,
ARM64_SYS_REG(3, 0, 0, 7, 3));
/*
* Note that if AArch32 support is not present in the host,