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softfloat: Inline pickNaNMulAdd
Inline pickNaNMulAdd into its only caller. This makes one assert redundant with the immediately preceding IF. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241203203949.483774-3-richard.henderson@linaro.org [PMM: keep comment from old code in new location] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2 changed files with 40 additions and 55 deletions
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@ -79,9 +79,48 @@ static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN *a, FloatPartsN *b,
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}
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}
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if (s->default_nan_mode) {
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if (s->default_nan_mode) {
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/*
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* We guarantee not to require the target to tell us how to
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* pick a NaN if we're always returning the default NaN.
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* But if we're not in default-NaN mode then the target must
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* specify.
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*/
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which = 3;
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which = 3;
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} else if (infzero) {
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/*
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* Inf * 0 + NaN -- some implementations return the
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* default NaN here, and some return the input NaN.
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*/
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switch (s->float_infzeronan_rule) {
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case float_infzeronan_dnan_never:
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which = 2;
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break;
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case float_infzeronan_dnan_always:
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which = 3;
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break;
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case float_infzeronan_dnan_if_qnan:
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which = is_qnan(c->cls) ? 3 : 2;
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break;
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default:
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g_assert_not_reached();
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}
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} else {
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} else {
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which = pickNaNMulAdd(a->cls, b->cls, c->cls, infzero, have_snan, s);
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FloatClass cls[3] = { a->cls, b->cls, c->cls };
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Float3NaNPropRule rule = s->float_3nan_prop_rule;
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assert(rule != float_3nan_prop_none);
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if (have_snan && (rule & R_3NAN_SNAN_MASK)) {
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/* We have at least one SNaN input and should prefer it */
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do {
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which = rule & R_3NAN_1ST_MASK;
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rule >>= R_3NAN_1ST_LENGTH;
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} while (!is_snan(cls[which]));
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} else {
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do {
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which = rule & R_3NAN_1ST_MASK;
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rule >>= R_3NAN_1ST_LENGTH;
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} while (!is_nan(cls[which]));
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}
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}
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}
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if (which == 3) {
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if (which == 3) {
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@ -448,60 +448,6 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
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}
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}
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}
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}
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/*----------------------------------------------------------------------------
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| Select which NaN to propagate for a three-input operation.
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| For the moment we assume that no CPU needs the 'larger significand'
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| information.
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| Return values : 0 : a; 1 : b; 2 : c; 3 : default-NaN
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*----------------------------------------------------------------------------*/
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static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
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bool infzero, bool have_snan, float_status *status)
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{
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FloatClass cls[3] = { a_cls, b_cls, c_cls };
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Float3NaNPropRule rule = status->float_3nan_prop_rule;
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int which;
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/*
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* We guarantee not to require the target to tell us how to
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* pick a NaN if we're always returning the default NaN.
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* But if we're not in default-NaN mode then the target must
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* specify.
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*/
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assert(!status->default_nan_mode);
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if (infzero) {
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/*
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* Inf * 0 + NaN -- some implementations return the default NaN here,
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* and some return the input NaN.
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*/
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switch (status->float_infzeronan_rule) {
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case float_infzeronan_dnan_never:
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return 2;
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case float_infzeronan_dnan_always:
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return 3;
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case float_infzeronan_dnan_if_qnan:
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return is_qnan(c_cls) ? 3 : 2;
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default:
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g_assert_not_reached();
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}
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}
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assert(rule != float_3nan_prop_none);
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if (have_snan && (rule & R_3NAN_SNAN_MASK)) {
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/* We have at least one SNaN input and should prefer it */
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do {
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which = rule & R_3NAN_1ST_MASK;
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rule >>= R_3NAN_1ST_LENGTH;
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} while (!is_snan(cls[which]));
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} else {
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do {
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which = rule & R_3NAN_1ST_MASK;
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rule >>= R_3NAN_1ST_LENGTH;
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} while (!is_nan(cls[which]));
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}
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return which;
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}
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/*----------------------------------------------------------------------------
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/*----------------------------------------------------------------------------
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| Returns 1 if the double-precision floating-point value `a' is a quiet
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| Returns 1 if the double-precision floating-point value `a' is a quiet
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| NaN; otherwise returns 0.
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| NaN; otherwise returns 0.
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