sparc64 really implement itlb/dtlb automatic replacement writes

- implement "used" bit in tlb translation entry
- mark tlb entry used if qemu code/data translation succeeds
- fold i/d mmu replacement writes code into replace_tlb_1bit_lru which
adds 1bit lru replacement algorithm; previously code tried to replace
first unlocked entry only

- extract more bitmasks to named macros
- add "immu" or "dmmu" type name to debugging output where appropriate

Signed-off-by: igor.v.kovalenko@gmail.com

--
Kind regards,
Igor V. Kovalenko
This commit is contained in:
Igor Kovalenko 2009-07-27 01:57:39 +04:00 committed by Blue Swirl
parent 6e8e7d4c09
commit f707726e8d
3 changed files with 84 additions and 90 deletions

View file

@ -409,7 +409,7 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,
}
// valid, context match, virtual address match?
if ((tlb->tte & 0x8000000000000000ULL) &&
if (TTE_IS_VALID(tlb->tte) &&
compare_masked(context, tlb->tag, 0x1fff) &&
compare_masked(address, tlb->tag, mask))
{
@ -468,6 +468,7 @@ static int get_physical_address_data(CPUState *env,
*prot = PAGE_READ;
if (env->dtlb[i].tte & 0x2)
*prot |= PAGE_WRITE;
TTE_SET_USED(env->dtlb[i].tte);
return 0;
}
}
@ -513,6 +514,7 @@ static int get_physical_address_code(CPUState *env,
return 1;
}
*prot = PAGE_EXEC;
TTE_SET_USED(env->itlb[i].tte);
return 0;
}
}