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target-mips: add MAAR, MAARI register
The MAAR register is a read/write register included in Release 5 of the architecture that defines the accessibility attributes of physical address regions. In particular, MAAR defines whether an instruction fetch or data load can speculatively access a memory region within the physical address bounds specified by MAAR. As QEMU doesn't do speculative access, hence this patch only provides ability to access the registers. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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6 changed files with 113 additions and 3 deletions
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@ -77,6 +77,8 @@ DEF_HELPER_1(mftc0_epc, tl, env)
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DEF_HELPER_1(mftc0_ebase, tl, env)
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DEF_HELPER_2(mftc0_configx, tl, env, tl)
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DEF_HELPER_1(mfc0_lladdr, tl, env)
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DEF_HELPER_1(mfc0_maar, tl, env)
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DEF_HELPER_1(mfhc0_maar, tl, env)
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DEF_HELPER_2(mfc0_watchlo, tl, env, i32)
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DEF_HELPER_2(mfc0_watchhi, tl, env, i32)
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DEF_HELPER_1(mfc0_debug, tl, env)
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@ -88,6 +90,7 @@ DEF_HELPER_1(dmfc0_tccontext, tl, env)
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DEF_HELPER_1(dmfc0_tcschedule, tl, env)
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DEF_HELPER_1(dmfc0_tcschefback, tl, env)
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DEF_HELPER_1(dmfc0_lladdr, tl, env)
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DEF_HELPER_1(dmfc0_maar, tl, env)
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DEF_HELPER_2(dmfc0_watchlo, tl, env, i32)
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#endif /* TARGET_MIPS64 */
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@ -144,6 +147,9 @@ DEF_HELPER_2(mtc0_config3, void, env, tl)
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DEF_HELPER_2(mtc0_config4, void, env, tl)
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DEF_HELPER_2(mtc0_config5, void, env, tl)
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DEF_HELPER_2(mtc0_lladdr, void, env, tl)
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DEF_HELPER_2(mtc0_maar, void, env, tl)
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DEF_HELPER_2(mthc0_maar, void, env, tl)
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DEF_HELPER_2(mtc0_maari, void, env, tl)
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DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32)
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DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32)
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DEF_HELPER_2(mtc0_xcontext, void, env, tl)
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