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hw/arm/smmu: Use enum for SMMU stage
Currently, translation stage is represented as an int, where 1 is stage-1 and 2 is stage-2, when nested is added, 3 would be confusing to represent nesting, so we use an enum instead. While keeping the same values, this is useful for: - Doing tricks with bit masks, where BIT(0) is stage-1 and BIT(1) is stage-2 and both is nested. - Tracing, as stage is printed as int. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Mostafa Saleh <smostafa@google.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-id: 20240715084519.1189624-5-smostafa@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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3 changed files with 25 additions and 17 deletions
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@ -49,8 +49,15 @@ typedef enum {
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SMMU_PTW_ERR_PERMISSION, /* Permission fault */
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} SMMUPTWEventType;
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/* SMMU Stage */
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typedef enum {
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SMMU_STAGE_1 = 1,
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SMMU_STAGE_2,
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SMMU_NESTED,
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} SMMUStage;
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typedef struct SMMUPTWEventInfo {
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int stage;
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SMMUStage stage;
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SMMUPTWEventType type;
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dma_addr_t addr; /* fetched address that induced an abort, if any */
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} SMMUPTWEventInfo;
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@ -88,7 +95,7 @@ typedef struct SMMUS2Cfg {
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*/
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typedef struct SMMUTransCfg {
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/* Shared fields between stage-1 and stage-2. */
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int stage; /* translation stage */
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SMMUStage stage; /* translation stage */
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bool disabled; /* smmu is disabled */
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bool bypassed; /* translation is bypassed */
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bool aborted; /* translation is aborted */
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