diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 52a1fa310b..570ea9edf2 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -144,7 +144,7 @@ static void clipper_init(MachineState *machine) } size = load_elf(palcode_filename, NULL, cpu_alpha_superpage_to_phys, NULL, &palcode_entry, NULL, NULL, NULL, - 0, EM_ALPHA, 0, 0); + ELFDATA2LSB, EM_ALPHA, 0, 0); if (size < 0) { error_report("could not load palcode '%s'", palcode_filename); exit(1); @@ -163,7 +163,7 @@ static void clipper_init(MachineState *machine) size = load_elf(kernel_filename, NULL, cpu_alpha_superpage_to_phys, NULL, &kernel_entry, &kernel_low, NULL, NULL, - 0, EM_ALPHA, 0, 0); + ELFDATA2LSB, EM_ALPHA, 0, 0); if (size < 0) { error_report("could not load kernel '%s'", kernel_filename); exit(1); diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index a67a890a33..98a6984611 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -608,7 +608,7 @@ void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, if (kernel_filename) { image_size = load_elf_as(kernel_filename, NULL, NULL, NULL, &entry, NULL, NULL, - NULL, 0, EM_ARM, 1, 0, as); + NULL, ELFDATA2LSB, EM_ARM, 1, 0, as); if (image_size < 0) { image_size = load_image_targphys_as(kernel_filename, mem_base, mem_size, as); diff --git a/hw/arm/boot.c b/hw/arm/boot.c index b44bea8a82..cbc24356fc 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -798,7 +798,7 @@ static ssize_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry, Elf64_Ehdr h64; } elf_header; int data_swab = 0; - bool big_endian; + int elf_data_order; ssize_t ret; Error *err = NULL; @@ -814,12 +814,12 @@ static ssize_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry, } if (elf_is64) { - big_endian = elf_header.h64.e_ident[EI_DATA] == ELFDATA2MSB; - info->endianness = big_endian ? ARM_ENDIANNESS_BE8 - : ARM_ENDIANNESS_LE; + elf_data_order = elf_header.h64.e_ident[EI_DATA]; + info->endianness = elf_data_order == ELFDATA2MSB ? ARM_ENDIANNESS_BE8 + : ARM_ENDIANNESS_LE; } else { - big_endian = elf_header.h32.e_ident[EI_DATA] == ELFDATA2MSB; - if (big_endian) { + elf_data_order = elf_header.h32.e_ident[EI_DATA]; + if (elf_data_order == ELFDATA2MSB) { if (bswap32(elf_header.h32.e_flags) & EF_ARM_BE8) { info->endianness = ARM_ENDIANNESS_BE8; } else { @@ -839,8 +839,8 @@ static ssize_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry, } ret = load_elf_as(info->kernel_filename, NULL, NULL, NULL, - pentry, lowaddr, highaddr, NULL, big_endian, elf_machine, - 1, data_swab, as); + pentry, lowaddr, highaddr, NULL, elf_data_order, + elf_machine, 1, data_swab, as); if (ret <= 0) { /* The header loaded but the image didn't */ error_report("Couldn't load elf '%s': %s", diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index f3a0ac40e4..ca2eb0d157 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -29,6 +29,7 @@ #include "hw/qdev-properties.h" #include "hw/arm/boot.h" #include "hw/arm/omap.h" +#include "hw/sd/sd.h" #include "system/blockdev.h" #include "system/system.h" #include "hw/arm/soc_dma.h" @@ -3716,7 +3717,6 @@ static void omap1_mpu_reset(void *opaque) omap_uart_reset(mpu->uart[0]); omap_uart_reset(mpu->uart[1]); omap_uart_reset(mpu->uart[2]); - omap_mmc_reset(mpu->mmc); omap_mpuio_reset(mpu->mpuio); omap_uwire_reset(mpu->microwire); omap_pwl_reset(mpu->pwl); @@ -3981,11 +3981,25 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, if (!dinfo && !qtest_enabled()) { warn_report("missing SecureDigital device"); } - s->mmc = omap_mmc_init(0xfffb7800, system_memory, - dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - qdev_get_gpio_in(s->ih[1], OMAP_INT_OQN), - &s->drq[OMAP_DMA_MMC_TX], - omap_findclk(s, "mmc_ck")); + + s->mmc = qdev_new(TYPE_OMAP_MMC); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s->mmc), &error_fatal); + omap_mmc_set_clk(s->mmc, omap_findclk(s, "mmc_ck")); + + memory_region_add_subregion(system_memory, 0xfffb7800, + sysbus_mmio_get_region(SYS_BUS_DEVICE(s->mmc), 0)); + qdev_connect_gpio_out_named(s->mmc, "dma-tx", 0, s->drq[OMAP_DMA_MMC_TX]); + qdev_connect_gpio_out_named(s->mmc, "dma-rx", 0, s->drq[OMAP_DMA_MMC_RX]); + sysbus_connect_irq(SYS_BUS_DEVICE(s->mmc), 0, + qdev_get_gpio_in(s->ih[1], OMAP_INT_OQN)); + + if (dinfo) { + DeviceState *card = qdev_new(TYPE_SD_CARD); + qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo), + &error_fatal); + qdev_realize_and_unref(card, qdev_get_child_bus(s->mmc, "sd-bus"), + &error_fatal); + } s->mpuio = omap_mpuio_init(system_memory, 0xfffb5000, qdev_get_gpio_in(s->ih[1], OMAP_INT_KEYBOARD), diff --git a/hw/avr/boot.c b/hw/avr/boot.c index 617f3a144c..e5a29c7218 100644 --- a/hw/avr/boot.c +++ b/hw/avr/boot.c @@ -71,11 +71,9 @@ bool avr_load_firmware(AVRCPU *cpu, MachineState *ms, return false; } - bytes_loaded = load_elf_ram_sym(filename, - NULL, NULL, NULL, - &entry, NULL, NULL, - &e_flags, 0, EM_AVR, 0, 0, - NULL, true, NULL); + bytes_loaded = load_elf_as(filename, NULL, NULL, NULL, + &entry, NULL, NULL, + &e_flags, ELFDATA2LSB, EM_AVR, 0, 0, NULL); if (bytes_loaded >= 0) { /* If ELF file is provided, determine CPU type reading ELF e_flags. */ const char *elf_cpu = avr_elf_e_flags_to_cpu_type(e_flags); diff --git a/hw/char/Kconfig b/hw/char/Kconfig index 4b73a803bf..1dc20ee4c2 100644 --- a/hw/char/Kconfig +++ b/hw/char/Kconfig @@ -78,3 +78,8 @@ config GOLDFISH_TTY config SHAKTI_UART bool + +config IP_OCTAL_232 + bool + default y + depends on IPACK diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index d1e5f6dad2..a2879977fb 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -184,9 +184,9 @@ static void update_irq(IPOctalState *dev, unsigned block) unsigned intno = block / 2; if ((blk0->isr & blk0->imr) || (blk1->isr & blk1->imr)) { - qemu_irq_raise(idev->irq[intno]); + qemu_irq_raise(&idev->irq[intno]); } else { - qemu_irq_lower(idev->irq[intno]); + qemu_irq_lower(&idev->irq[intno]); } } diff --git a/hw/char/meson.build b/hw/char/meson.build index 1750834385..ed3529cbbb 100644 --- a/hw/char/meson.build +++ b/hw/char/meson.build @@ -4,7 +4,7 @@ system_ss.add(when: 'CONFIG_ESCC', if_true: files('escc.c')) system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_apbuart.c')) system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_uart.c')) system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_serial.c')) -system_ss.add(when: 'CONFIG_IPACK', if_true: files('ipoctal232.c')) +system_ss.add(when: 'CONFIG_IP_OCTAL_232', if_true: files('ipoctal232.c')) system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('parallel-isa.c')) system_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugcon.c')) system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_uart.c')) diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 7578e863cf..718ae25131 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -45,7 +45,7 @@ typedef struct PCIMultiSerialState { char *name[PCI_SERIAL_MAX_PORTS]; SerialState state[PCI_SERIAL_MAX_PORTS]; uint32_t level[PCI_SERIAL_MAX_PORTS]; - qemu_irq *irqs; + IRQState irqs[PCI_SERIAL_MAX_PORTS]; uint8_t prog_if; } PCIMultiSerialState; @@ -61,7 +61,6 @@ static void multi_serial_pci_exit(PCIDevice *dev) memory_region_del_subregion(&pci->iobar, &s->io); g_free(pci->name[i]); } - qemu_free_irqs(pci->irqs, pci->ports); } static void multi_serial_irq_mux(void *opaque, int n, int level) @@ -102,7 +101,6 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports); pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar); - pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, nports); for (i = 0; i < nports; i++) { s = pci->state + i; @@ -110,7 +108,7 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) multi_serial_pci_exit(dev); return; } - s->irq = pci->irqs[i]; + s->irq = &pci->irqs[i]; pci->name[i] = g_strdup_printf("uart #%zu", i + 1); memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, pci->name[i], 8); @@ -183,6 +181,7 @@ static void multi_serial_init(Object *o) size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev)); for (i = 0; i < nports; i++) { + qemu_init_irq(&pms->irqs[i], multi_serial_irq_mux, pms, i); object_initialize_child(o, "serial[*]", &pms->state[i], TYPE_SERIAL); } } diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index fb354693af..d9f5c2e832 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -31,7 +31,6 @@ */ #include "qemu/osdep.h" -#include "exec/tswap.h" #include "system/dma.h" #include "system/reset.h" #include "hw/boards.h" @@ -66,7 +65,6 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) { GenericLoaderState *s = GENERIC_LOADER(dev); hwaddr entry; - int big_endian; ssize_t size = 0; s->set_pc = false; @@ -134,14 +132,12 @@ static void generic_loader_realize(DeviceState *dev, Error **errp) s->cpu = first_cpu; } - big_endian = target_words_bigendian(); - if (s->file) { AddressSpace *as = s->cpu ? s->cpu->as : NULL; if (!s->force_raw) { size = load_elf_as(s->file, NULL, NULL, NULL, &entry, NULL, NULL, - NULL, big_endian, 0, 0, 0, as); + NULL, ELFDATANONE, 0, 0, 0, as); if (size < 0) { size = load_uimage_as(s->file, &entry, NULL, NULL, NULL, NULL, diff --git a/hw/core/irq.c b/hw/core/irq.c index 7d5b0038c1..6dd8d47bd6 100644 --- a/hw/core/irq.c +++ b/hw/core/irq.c @@ -49,6 +49,14 @@ void qemu_init_irq(IRQState *irq, qemu_irq_handler handler, void *opaque, init_irq_fields(irq, handler, opaque, n); } +void qemu_init_irqs(IRQState irq[], size_t count, + qemu_irq_handler handler, void *opaque) +{ + for (size_t i = 0; i < count; i++) { + qemu_init_irq(&irq[i], handler, opaque, i); + } +} + qemu_irq *qemu_extend_irqs(qemu_irq *old, int n_old, qemu_irq_handler handler, void *opaque, int n) { diff --git a/hw/core/loader.c b/hw/core/loader.c index 4dfdb027ee..fd25c5e01b 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -409,11 +409,11 @@ ssize_t load_elf(const char *filename, uint64_t (*elf_note_fn)(void *, void *, bool), uint64_t (*translate_fn)(void *, uint64_t), void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, + uint64_t *highaddr, uint32_t *pflags, int elf_data_order, int elf_machine, int clear_lsb, int data_swab) { return load_elf_as(filename, elf_note_fn, translate_fn, translate_opaque, - pentry, lowaddr, highaddr, pflags, big_endian, + pentry, lowaddr, highaddr, pflags, elf_data_order, elf_machine, clear_lsb, data_swab, NULL); } @@ -422,29 +422,15 @@ ssize_t load_elf_as(const char *filename, uint64_t (*elf_note_fn)(void *, void *, bool), uint64_t (*translate_fn)(void *, uint64_t), void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, + uint64_t *highaddr, uint32_t *pflags, int elf_data_order, int elf_machine, int clear_lsb, int data_swab, AddressSpace *as) -{ - return load_elf_ram(filename, elf_note_fn, translate_fn, translate_opaque, - pentry, lowaddr, highaddr, pflags, big_endian, - elf_machine, clear_lsb, data_swab, as, true); -} - -/* return < 0 if error, otherwise the number of bytes loaded in memory */ -ssize_t load_elf_ram(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, - uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, - int big_endian, int elf_machine, int clear_lsb, - int data_swab, AddressSpace *as, bool load_rom) { return load_elf_ram_sym(filename, elf_note_fn, translate_fn, translate_opaque, - pentry, lowaddr, highaddr, pflags, big_endian, + pentry, lowaddr, highaddr, pflags, elf_data_order, elf_machine, clear_lsb, data_swab, as, - load_rom, NULL); + true, NULL); } /* return < 0 if error, otherwise the number of bytes loaded in memory */ @@ -453,11 +439,12 @@ ssize_t load_elf_ram_sym(const char *filename, uint64_t (*translate_fn)(void *, uint64_t), void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, uint64_t *highaddr, - uint32_t *pflags, int big_endian, int elf_machine, + uint32_t *pflags, int elf_data_order, int elf_machine, int clear_lsb, int data_swab, AddressSpace *as, bool load_rom, symbol_fn_t sym_cb) { - int fd, data_order, target_data_order, must_swab; + const int host_data_order = HOST_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB; + int fd, must_swab; ssize_t ret = ELF_LOAD_FAILED; uint8_t e_ident[EI_NIDENT]; @@ -475,23 +462,14 @@ ssize_t load_elf_ram_sym(const char *filename, ret = ELF_LOAD_NOT_ELF; goto fail; } -#if HOST_BIG_ENDIAN - data_order = ELFDATA2MSB; -#else - data_order = ELFDATA2LSB; -#endif - must_swab = data_order != e_ident[EI_DATA]; - if (big_endian) { - target_data_order = ELFDATA2MSB; - } else { - target_data_order = ELFDATA2LSB; - } - if (target_data_order != e_ident[EI_DATA]) { + if (elf_data_order != ELFDATANONE && elf_data_order != e_ident[EI_DATA]) { ret = ELF_LOAD_WRONG_ENDIAN; goto fail; } + must_swab = host_data_order != e_ident[EI_DATA]; + lseek(fd, 0, SEEK_SET); if (e_ident[EI_CLASS] == ELFCLASS64) { ret = load_elf64(filename, fd, elf_note_fn, diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 0dd1908214..b6135d9526 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -440,7 +440,7 @@ static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus, size = load_elf(firmware_filename, NULL, translate, NULL, &firmware_entry, &firmware_low, &firmware_high, NULL, - true, EM_PARISC, 0, 0); + ELFDATA2MSB, EM_PARISC, 0, 0); if (size < 0) { error_report("could not load firmware '%s'", firmware_filename); @@ -467,7 +467,7 @@ static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus, if (kernel_filename) { size = load_elf(kernel_filename, NULL, linux_kernel_virt_to_phys, NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, - true, EM_PARISC, 0, 0); + ELFDATA2MSB, EM_PARISC, 0, 0); kernel_entry = linux_kernel_virt_to_phys(NULL, kernel_entry); diff --git a/hw/i386/multiboot.c b/hw/i386/multiboot.c index 1d66ca3204..cd07a05861 100644 --- a/hw/i386/multiboot.c +++ b/hw/i386/multiboot.c @@ -202,8 +202,8 @@ int load_multiboot(X86MachineState *x86ms, } kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, - &elf_low, &elf_high, NULL, 0, I386_ELF_MACHINE, - 0, 0); + &elf_low, &elf_high, NULL, + ELFDATA2LSB, I386_ELF_MACHINE, 0, 0); if (kernel_size < 0) { error_report("Error while loading elf kernel"); exit(1); diff --git a/hw/i386/x86-common.c b/hw/i386/x86-common.c index 008496b5b8..1b0671c523 100644 --- a/hw/i386/x86-common.c +++ b/hw/i386/x86-common.c @@ -608,8 +608,8 @@ static bool load_elfboot(const char *kernel_filename, uint64_t elf_note_type = XEN_ELFNOTE_PHYS32_ENTRY; kernel_size = load_elf(kernel_filename, read_pvh_start_addr, NULL, &elf_note_type, &elf_entry, - &elf_low, &elf_high, NULL, 0, I386_ELF_MACHINE, - 0, 0); + &elf_low, &elf_high, NULL, + ELFDATA2LSB, I386_ELF_MACHINE, 0, 0); if (kernel_size < 0) { error_report("Error while loading elf kernel"); diff --git a/hw/ipack/Kconfig b/hw/ipack/Kconfig index f8da24a62b..28d668727c 100644 --- a/hw/ipack/Kconfig +++ b/hw/ipack/Kconfig @@ -1,4 +1,8 @@ config IPACK bool + +config TPCI200 + bool + select IPACK default y if PCI_DEVICES depends on PCI diff --git a/hw/ipack/ipack.c b/hw/ipack/ipack.c index ed75f79183..b6defae602 100644 --- a/hw/ipack/ipack.c +++ b/hw/ipack/ipack.c @@ -55,22 +55,19 @@ static void ipack_device_realize(DeviceState *dev, Error **errp) } bus->free_slot = idev->slot + 1; - idev->irq = qemu_allocate_irqs(bus->set_irq, idev, 2); + qemu_init_irqs(idev->irq, ARRAY_SIZE(idev->irq), bus->set_irq, idev); k->realize(dev, errp); } static void ipack_device_unrealize(DeviceState *dev) { - IPackDevice *idev = IPACK_DEVICE(dev); IPackDeviceClass *k = IPACK_DEVICE_GET_CLASS(dev); if (k->unrealize) { k->unrealize(dev); return; } - - qemu_free_irqs(idev->irq, 2); } static const Property ipack_device_props[] = { diff --git a/hw/ipack/meson.build b/hw/ipack/meson.build index 26567f1068..e480522892 100644 --- a/hw/ipack/meson.build +++ b/hw/ipack/meson.build @@ -1 +1,2 @@ -system_ss.add(when: 'CONFIG_IPACK', if_true: files('ipack.c', 'tpci200.c')) +system_ss.add(when: 'CONFIG_IPACK', if_true: files('ipack.c')) +system_ss.add(when: 'CONFIG_TPCI200', if_true: files('tpci200.c')) diff --git a/hw/ipack/tpci200.c b/hw/ipack/tpci200.c index 88eef4b830..470a4203ae 100644 --- a/hw/ipack/tpci200.c +++ b/hw/ipack/tpci200.c @@ -275,11 +275,11 @@ static void tpci200_write_las0(void *opaque, hwaddr addr, uint64_t val, if (ip != NULL) { if (val & STATUS_INT(i, 0)) { DPRINTF("Clear IP %c INT0# status\n", 'A' + i); - qemu_irq_lower(ip->irq[0]); + qemu_irq_lower(&ip->irq[0]); } if (val & STATUS_INT(i, 1)) { DPRINTF("Clear IP %c INT1# status\n", 'A' + i); - qemu_irq_lower(ip->irq[1]); + qemu_irq_lower(&ip->irq[1]); } } @@ -344,7 +344,7 @@ static uint64_t tpci200_read_las1(void *opaque, hwaddr addr, unsigned size) bool int_set = s->status & STATUS_INT(ip_n, intno); bool int_edge_sensitive = s->ctrl[ip_n] & CTRL_INT_EDGE(intno); if (int_set && !int_edge_sensitive) { - qemu_irq_lower(ip->irq[intno]); + qemu_irq_lower(&ip->irq[intno]); } } diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c index bd8763c61c..354cf458c8 100644 --- a/hw/loongarch/boot.c +++ b/hw/loongarch/boot.c @@ -243,7 +243,7 @@ static int64_t load_kernel_info(struct loongarch_boot_info *info) kernel_size = load_elf(info->kernel_filename, NULL, cpu_loongarch_virt_to_phys, NULL, &kernel_entry, &kernel_low, - &kernel_high, NULL, 0, + &kernel_high, NULL, ELFDATA2LSB, EM_LOONGARCH, 1, 0); if (kernel_size < 0) { kernel_size = load_loongarch_linux_image(info->kernel_filename, diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index 7b8210475e..d97399b882 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -74,7 +74,7 @@ static void an5206_init(MachineState *machine) } kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, - NULL, NULL, NULL, 1, EM_68K, 0, 0); + NULL, NULL, NULL, ELFDATA2MSB, EM_68K, 0, 0); entry = elf_entry; if (kernel_size < 0) { kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL, diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index 409bb72574..75cc076f78 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -372,7 +372,7 @@ static void mcf5208evb_init(MachineState *machine) } kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, - NULL, NULL, NULL, 1, EM_68K, 0, 0); + NULL, NULL, NULL, ELFDATA2MSB, EM_68K, 0, 0); entry = elf_entry; if (kernel_size < 0) { kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL, diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index ca3adb9a8a..aeed4c8ddb 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -585,7 +585,7 @@ static void q800_machine_init(MachineState *machine) } kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, - &elf_entry, NULL, &high, NULL, 1, + &elf_entry, NULL, &high, NULL, ELFDATA2MSB, EM_68K, 0, 0); if (kernel_size < 0) { error_report("could not load kernel '%s'", kernel_filename); diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c index 87ec39eeae..d967bdd743 100644 --- a/hw/m68k/virt.c +++ b/hw/m68k/virt.c @@ -228,7 +228,7 @@ static void virt_init(MachineState *machine) } kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, - &elf_entry, NULL, &high, NULL, 1, + &elf_entry, NULL, &high, NULL, ELFDATA2MSB, EM_68K, 0, 0); if (kernel_size < 0) { error_report("could not load kernel '%s'", kernel_filename); diff --git a/hw/microblaze/boot.c b/hw/microblaze/boot.c index 3854bc2291..60b4ef0abe 100644 --- a/hw/microblaze/boot.c +++ b/hw/microblaze/boot.c @@ -144,13 +144,15 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, bool is_little_endian, /* Boots a kernel elf binary. */ kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &entry, NULL, &high, NULL, - !is_little_endian, EM_MICROBLAZE, 0, 0); + is_little_endian ? ELFDATA2LSB : ELFDATA2MSB, + EM_MICROBLAZE, 0, 0); base32 = entry; if (base32 == 0xc0000000) { kernel_size = load_elf(kernel_filename, NULL, translate_kernel_address, NULL, &entry, NULL, NULL, NULL, - !is_little_endian, EM_MICROBLAZE, 0, 0); + is_little_endian ? ELFDATA2LSB : ELFDATA2MSB, + EM_MICROBLAZE, 0, 0); } /* Always boot into physical ram. */ boot_info.bootstrap_pc = (uint32_t)entry; diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 67044af962..364c328032 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -792,7 +792,7 @@ static void boston_mach_init(MachineState *machine) kernel_size = load_elf(machine->kernel_filename, NULL, cpu_mips_kseg0_to_phys, NULL, &kernel_entry, NULL, &kernel_high, - NULL, 0, EM_MIPS, 1, 0); + NULL, ELFDATA2LSB, EM_MIPS, 1, 0); if (kernel_size > 0) { int dt_size; diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index 16b6a5129e..646044e274 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -106,7 +106,7 @@ static uint64_t load_kernel(MIPSCPU *cpu) cpu_mips_kseg0_to_phys, NULL, &kernel_entry, NULL, &kernel_high, NULL, - 0, EM_MIPS, 1, 0); + ELFDATA2LSB, EM_MIPS, 1, 0); if (kernel_size < 0) { error_report("could not load kernel '%s': %s", loaderparams.kernel_filename, diff --git a/hw/mips/loongson3_bootp.c b/hw/mips/loongson3_bootp.c index b97b81903b..67812666c5 100644 --- a/hw/mips/loongson3_bootp.c +++ b/hw/mips/loongson3_bootp.c @@ -21,16 +21,17 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "qemu/cutils.h" -#include "cpu.h" -#include "hw/boards.h" +#include "qemu/bswap.h" +#include "exec/hwaddr.h" #include "hw/mips/loongson3_bootp.h" -static void init_cpu_info(void *g_cpuinfo, uint64_t cpu_freq) +static void init_cpu_info(void *g_cpuinfo, uint32_t cpu_count, + uint32_t processor_id, uint64_t cpu_freq) { struct efi_cpuinfo_loongson *c = g_cpuinfo; c->cputype = cpu_to_le32(Loongson_3A); - c->processor_id = cpu_to_le32(MIPS_CPU(first_cpu)->env.CP0_PRid); + c->processor_id = cpu_to_le32(processor_id); if (cpu_freq > UINT_MAX) { c->cpu_clock_freq = cpu_to_le32(UINT_MAX); } else { @@ -38,8 +39,8 @@ static void init_cpu_info(void *g_cpuinfo, uint64_t cpu_freq) } c->cpu_startup_core_id = cpu_to_le16(0); - c->nr_cpus = cpu_to_le32(current_machine->smp.cpus); - c->total_node = cpu_to_le32(DIV_ROUND_UP(current_machine->smp.cpus, + c->nr_cpus = cpu_to_le32(cpu_count); + c->total_node = cpu_to_le32(DIV_ROUND_UP(cpu_count, LOONGSON3_CORE_PER_NODE)); } @@ -110,9 +111,10 @@ static void init_special_info(void *g_special) } void init_loongson_params(struct loongson_params *lp, void *p, + uint32_t cpu_count, uint32_t processor_id, uint64_t cpu_freq, uint64_t ram_size) { - init_cpu_info(p, cpu_freq); + init_cpu_info(p, cpu_count, processor_id, cpu_freq); lp->cpu_offset = cpu_to_le64((uintptr_t)p - (uintptr_t)lp); p += ROUND_UP(sizeof(struct efi_cpuinfo_loongson), 64); diff --git a/hw/mips/loongson3_bootp.h b/hw/mips/loongson3_bootp.h index 9091265df7..9dc325a855 100644 --- a/hw/mips/loongson3_bootp.h +++ b/hw/mips/loongson3_bootp.h @@ -233,6 +233,7 @@ enum { extern const MemMapEntry virt_memmap[]; void init_loongson_params(struct loongson_params *lp, void *p, + uint32_t cpu_count, uint32_t processor_id, uint64_t cpu_freq, uint64_t ram_size); void init_reset_system(struct efi_reset_system_t *reset); diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c index f3cc7a8376..831fddb1bd 100644 --- a/hw/mips/loongson3_virt.c +++ b/hw/mips/loongson3_virt.c @@ -153,7 +153,7 @@ static const MemoryRegionOps loongson3_pm_ops = { #define DEF_LOONGSON3_FREQ (800 * 1000 * 1000) -static uint64_t get_cpu_freq_hz(void) +static uint64_t get_cpu_freq_hz(const MIPSCPU *cpu) { #ifdef CONFIG_KVM int ret; @@ -164,7 +164,7 @@ static uint64_t get_cpu_freq_hz(void) }; if (kvm_enabled()) { - ret = kvm_vcpu_ioctl(first_cpu, KVM_GET_ONE_REG, &freq_reg); + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_ONE_REG, &freq_reg); if (ret >= 0) { return freq * 2; } @@ -173,7 +173,7 @@ static uint64_t get_cpu_freq_hz(void) return DEF_LOONGSON3_FREQ; } -static void init_boot_param(void) +static void init_boot_param(unsigned cpu_count, uint32_t processor_id) { static void *p; struct boot_params *bp; @@ -184,7 +184,7 @@ static void init_boot_param(void) bp->efi.smbios.vers = cpu_to_le16(1); init_reset_system(&(bp->reset_system)); p += ROUND_UP(sizeof(struct boot_params), 64); - init_loongson_params(&(bp->efi.smbios.lp), p, + init_loongson_params(&(bp->efi.smbios.lp), p, cpu_count, processor_id, loaderparams.cpu_freq, loaderparams.ram_size); rom_add_blob_fixed("params_rom", bp, @@ -280,7 +280,7 @@ static void fw_cfg_boot_set(void *opaque, const char *boot_device, fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); } -static void fw_conf_init(unsigned long ram_size) +static void fw_conf_init(void) { static const uint8_t suspend[6] = {128, 0, 0, 129, 128, 128}; FWCfgState *fw_cfg; @@ -289,9 +289,9 @@ static void fw_conf_init(unsigned long ram_size) fw_cfg = fw_cfg_init_mem_wide(cfg_addr, cfg_addr + 8, 8, 0, NULL); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)current_machine->smp.cpus); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)current_machine->smp.max_cpus); - fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); + fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, loaderparams.ram_size); fw_cfg_add_i32(fw_cfg, FW_CFG_MACHINE_VERSION, 1); - fw_cfg_add_i64(fw_cfg, FW_CFG_CPU_FREQ, get_cpu_freq_hz()); + fw_cfg_add_i64(fw_cfg, FW_CFG_CPU_FREQ, loaderparams.cpu_freq); fw_cfg_add_file(fw_cfg, "etc/system-states", g_memdup2(suspend, sizeof(suspend)), sizeof(suspend)); @@ -358,7 +358,7 @@ static uint64_t load_kernel(CPUMIPSState *env) cpu_mips_kseg0_to_phys, NULL, &kernel_entry, &kernel_low, &kernel_high, - NULL, 0, EM_MIPS, 1, 0); + NULL, ELFDATA2LSB, EM_MIPS, 1, 0); if (kernel_size < 0) { error_report("could not load kernel '%s': %s", loaderparams.kernel_filename, @@ -399,25 +399,33 @@ static uint64_t load_kernel(CPUMIPSState *env) return kernel_entry; } -static void main_cpu_reset(void *opaque) +static void generic_cpu_reset(void *opaque) { MIPSCPU *cpu = opaque; CPUMIPSState *env = &cpu->env; cpu_reset(CPU(cpu)); - /* Loongson-3 reset stuff */ if (loaderparams.kernel_filename) { - if (cpu == MIPS_CPU(first_cpu)) { - env->active_tc.gpr[4] = loaderparams.a0; - env->active_tc.gpr[5] = loaderparams.a1; - env->active_tc.gpr[6] = loaderparams.a2; - env->active_tc.PC = loaderparams.kernel_entry; - } env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); } } +static void main_cpu_reset(void *opaque) +{ + generic_cpu_reset(opaque); + + if (loaderparams.kernel_filename) { + MIPSCPU *cpu = opaque; + CPUMIPSState *env = &cpu->env; + + env->active_tc.gpr[4] = loaderparams.a0; + env->active_tc.gpr[5] = loaderparams.a1; + env->active_tc.gpr[6] = loaderparams.a2; + env->active_tc.PC = loaderparams.kernel_entry; + } +} + static inline void loongson3_virt_devices_init(MachineState *machine, DeviceState *pic) { @@ -484,9 +492,8 @@ static void mips_loongson3_virt_init(MachineState *machine) { int i; long bios_size; - MIPSCPU *cpu; + MIPSCPU *cpu = NULL; Clock *cpuclk; - CPUMIPSState *env; DeviceState *liointc; DeviceState *ipi = NULL; char *filename; @@ -561,7 +568,7 @@ static void mips_loongson3_virt_init(MachineState *machine) cpuclk = clock_new(OBJECT(machine), "cpu-refclk"); clock_set_hz(cpuclk, DEF_LOONGSON3_FREQ); - for (i = 0; i < machine->smp.cpus; i++) { + for (i = machine->smp.cpus - 1; i >= 0; --i) { int node = i / LOONGSON3_CORE_PER_NODE; int core = i % LOONGSON3_CORE_PER_NODE; int ip; @@ -572,7 +579,7 @@ static void mips_loongson3_virt_init(MachineState *machine) /* Init internal devices */ cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); - qemu_register_reset(main_cpu_reset, cpu); + qemu_register_reset(i ? generic_cpu_reset : main_cpu_reset, cpu); if (!kvm_enabled()) { hwaddr base = ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].base; @@ -601,7 +608,7 @@ static void mips_loongson3_virt_init(MachineState *machine) pin, cpu->env.irq[ip + 2]); } } - env = &MIPS_CPU(first_cpu)->env; + assert(cpu); /* This variable points to the first created cpu. */ /* Allocate RAM/BIOS, 0x00000000~0x10000000 is alias of 0x80000000~0x90000000 */ memory_region_init_rom(bios, NULL, "loongson3.bios", @@ -626,16 +633,16 @@ static void mips_loongson3_virt_init(MachineState *machine) * Please use -L to set the BIOS path and -bios to set bios name. */ + loaderparams.cpu_freq = get_cpu_freq_hz(cpu); + loaderparams.ram_size = ram_size; if (kernel_filename) { - loaderparams.cpu_freq = get_cpu_freq_hz(); - loaderparams.ram_size = ram_size; loaderparams.kernel_filename = kernel_filename; loaderparams.kernel_cmdline = kernel_cmdline; loaderparams.initrd_filename = initrd_filename; - loaderparams.kernel_entry = load_kernel(env); + loaderparams.kernel_entry = load_kernel(&cpu->env); init_boot_rom(); - init_boot_param(); + init_boot_param(machine->smp.cpus, cpu->env.CP0_PRid); } else { filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware ?: LOONGSON3_BIOSNAME); @@ -654,7 +661,7 @@ static void mips_loongson3_virt_init(MachineState *machine) exit(1); } - fw_conf_init(ram_size); + fw_conf_init(); } loongson3_virt_devices_init(machine, liointc); diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 4e9cccaa34..8e9cea70b1 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -880,8 +880,9 @@ static uint64_t load_kernel(void) kernel_size = load_elf(loaderparams.kernel_filename, NULL, cpu_mips_kseg0_to_phys, NULL, &kernel_entry, NULL, - &kernel_high, NULL, TARGET_BIG_ENDIAN, EM_MIPS, - 1, 0); + &kernel_high, NULL, + TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB, + EM_MIPS, 1, 0); if (kernel_size < 0) { error_report("could not load kernel '%s': %s", loaderparams.kernel_filename, diff --git a/hw/mips/meson.build b/hw/mips/meson.build index fcbee53bb3..31dbd2bf4d 100644 --- a/hw/mips/meson.build +++ b/hw/mips/meson.build @@ -1,7 +1,8 @@ mips_ss = ss.source_set() mips_ss.add(files('bootloader.c', 'mips_int.c')) common_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c')) -mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 'loongson3_virt.c')) +common_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c')) +mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_virt.c')) mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c')) mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c')) diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index a294779a82..c530688e76 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -73,7 +73,8 @@ static uint64_t load_kernel(void) kernel_size = load_elf(loaderparams.kernel_filename, NULL, cpu_mips_kseg0_to_phys, NULL, &entry, NULL, - &kernel_high, NULL, TARGET_BIG_ENDIAN, + &kernel_high, NULL, + TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB, EM_MIPS, 1, 0); if (kernel_size < 0) { error_report("could not load kernel '%s': %s", diff --git a/hw/misc/i2c-echo.c b/hw/misc/i2c-echo.c index 5ae3d0817e..65d10029dc 100644 --- a/hw/misc/i2c-echo.c +++ b/hw/misc/i2c-echo.c @@ -13,6 +13,7 @@ #include "qemu/main-loop.h" #include "block/aio.h" #include "hw/i2c/i2c.h" +#include "trace.h" #define TYPE_I2C_ECHO "i2c-echo" OBJECT_DECLARE_SIMPLE_TYPE(I2CEchoState, I2C_ECHO) @@ -80,11 +81,13 @@ static int i2c_echo_event(I2CSlave *s, enum i2c_event event) case I2C_START_RECV: state->pos = 0; + trace_i2c_echo_event(DEVICE(s)->canonical_path, "I2C_START_RECV"); break; case I2C_START_SEND: state->pos = 0; + trace_i2c_echo_event(DEVICE(s)->canonical_path, "I2C_START_SEND"); break; case I2C_FINISH: @@ -92,12 +95,15 @@ static int i2c_echo_event(I2CSlave *s, enum i2c_event event) state->state = I2C_ECHO_STATE_START_SEND; i2c_bus_master(state->bus, state->bh); + trace_i2c_echo_event(DEVICE(s)->canonical_path, "I2C_FINISH"); break; case I2C_NACK: + trace_i2c_echo_event(DEVICE(s)->canonical_path, "I2C_NACK"); break; default: + trace_i2c_echo_event(DEVICE(s)->canonical_path, "UNHANDLED"); return -1; } @@ -112,6 +118,7 @@ static uint8_t i2c_echo_recv(I2CSlave *s) return 0xff; } + trace_i2c_echo_recv(DEVICE(s)->canonical_path, state->data[state->pos]); return state->data[state->pos++]; } @@ -119,6 +126,7 @@ static int i2c_echo_send(I2CSlave *s, uint8_t data) { I2CEchoState *state = I2C_ECHO(s); + trace_i2c_echo_send(DEVICE(s)->canonical_path, data); if (state->pos > 2) { return -1; } diff --git a/hw/misc/trace-events b/hw/misc/trace-events index cf1abe6928..b35b0e77f7 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -390,3 +390,8 @@ ivshmem_flat_read_write_mmr_invalid(uint64_t addr_offset) "No ivshmem register m ivshmem_flat_interrupt_invalid_peer(uint16_t peer_id) "Can't interrupt non-existing peer %u" ivshmem_flat_write_mmr(uint64_t addr_offset) "Write access at offset %"PRIu64 ivshmem_flat_interrupt_peer(uint16_t peer_id, uint16_t vector_id) "Interrupting peer ID %u, vector %u..." + +# i2c-echo.c +i2c_echo_event(const char *id, const char *event) "%s: %s" +i2c_echo_recv(const char *id, uint8_t data) "%s: recv 0x%02" PRIx8 +i2c_echo_send(const char *id, uint8_t data) "%s: send 0x%02" PRIx8 diff --git a/hw/openrisc/boot.c b/hw/openrisc/boot.c index 83c1fc6705..0f08df812d 100644 --- a/hw/openrisc/boot.c +++ b/hw/openrisc/boot.c @@ -32,7 +32,7 @@ hwaddr openrisc_load_kernel(ram_addr_t ram_size, if (kernel_filename && !qtest_enabled()) { kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, - &elf_entry, NULL, &high_addr, NULL, 1, + &elf_entry, NULL, &high_addr, NULL, ELFDATA2MSB, EM_OPENRISC, 1, 0); entry = elf_entry; if (kernel_size < 0) { diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c index 918a3237a9..e3d8d206b7 100644 --- a/hw/pci-host/raven.c +++ b/hw/pci-host/raven.c @@ -357,8 +357,8 @@ static void raven_realize(PCIDevice *d, Error **errp) if (filename) { if (s->elf_machine != EM_NONE) { bios_size = load_elf(filename, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, 1, s->elf_machine, - 0, 0); + NULL, NULL, NULL, + ELFDATA2MSB, s->elf_machine, 0, 0); } if (bios_size < 0) { bios_size = get_image_size(filename); diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 4551157c01..26933e0457 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -1194,7 +1194,7 @@ void ppce500_init(MachineState *machine) payload_size = load_elf(filename, NULL, NULL, NULL, &bios_entry, &loadaddr, NULL, NULL, - 1, PPC_ELF_MACHINE, 0, 0); + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); if (payload_size < 0) { /* * Hrm. No ELF image? Try a uImage, maybe someone is giving us an diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 6369961f78..cb3dc3ab48 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -182,7 +182,8 @@ static void ppc_core99_init(MachineState *machine) if (filename) { /* Load OpenBIOS (ELF) */ bios_size = load_elf(filename, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); + NULL, NULL, NULL, + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); if (bios_size <= 0) { /* or load binary ROM image */ @@ -204,7 +205,7 @@ static void ppc_core99_init(MachineState *machine) kernel_base = KERNEL_LOAD_ADDR; kernel_size = load_elf(machine->kernel_filename, NULL, translate_kernel_address, NULL, NULL, NULL, - NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); + NULL, NULL, ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); if (kernel_size < 0) { kernel_size = load_aout(machine->kernel_filename, kernel_base, machine->ram_size - kernel_base, diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 59653e174b..0dbcea035c 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -136,7 +136,7 @@ static void ppc_heathrow_init(MachineState *machine) if (filename) { /* Load OpenBIOS (ELF) */ bios_size = load_elf(filename, NULL, NULL, NULL, NULL, &bios_addr, - NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); + NULL, NULL, ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); /* Unfortunately, load_elf sign-extends reading elf32 */ bios_addr = (uint32_t)bios_addr; @@ -161,7 +161,7 @@ static void ppc_heathrow_init(MachineState *machine) kernel_base = KERNEL_LOAD_ADDR; kernel_size = load_elf(machine->kernel_filename, NULL, translate_kernel_address, NULL, NULL, NULL, - NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); + NULL, NULL, ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); if (kernel_size < 0) { kernel_size = load_aout(machine->kernel_filename, kernel_base, machine->ram_size - kernel_base, diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index b3c21bdc57..0364243f4f 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -160,8 +160,8 @@ static void pegasos2_init(MachineState *machine) } memory_region_init_rom(rom, NULL, "pegasos2.rom", PROM_SIZE, &error_fatal); memory_region_add_subregion(get_system_memory(), PROM_ADDR, rom); - sz = load_elf(filename, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 1, - PPC_ELF_MACHINE, 0, 0); + sz = load_elf(filename, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); if (sz <= 0) { sz = load_image_targphys(filename, pm->vof ? 0 : PROM_ADDR, PROM_SIZE); } @@ -239,8 +239,8 @@ static void pegasos2_init(MachineState *machine) if (machine->kernel_filename) { sz = load_elf(machine->kernel_filename, NULL, NULL, NULL, - &pm->kernel_entry, &pm->kernel_addr, NULL, NULL, 1, - PPC_ELF_MACHINE, 0, 0); + &pm->kernel_entry, &pm->kernel_addr, NULL, NULL, + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); if (sz <= 0) { error_report("Could not load kernel '%s'", machine->kernel_filename); diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index e9f65fab70..969cac345a 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -232,7 +232,7 @@ static void boot_from_kernel(MachineState *machine, PowerPCCPU *cpu) kernel_size = load_elf(machine->kernel_filename, NULL, NULL, NULL, &boot_entry, &kernel_base, NULL, NULL, - 1, PPC_ELF_MACHINE, 0, 0); + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); if (kernel_size < 0) { error_report("Could not load kernel '%s' : %s", machine->kernel_filename, load_elf_strerror(kernel_size)); diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index 45c5b8678d..099fda3909 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -228,7 +228,8 @@ static void bamboo_init(MachineState *machine) if (success < 0) { uint64_t elf_entry; success = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, - NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); + NULL, NULL, NULL, + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); entry = elf_entry; } /* XXX try again as binary */ diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index e74642a3b7..3ecae6a950 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -479,7 +479,7 @@ static void sam460ex_init(MachineState *machine) success = load_elf(machine->kernel_filename, NULL, NULL, NULL, &elf_entry, NULL, NULL, NULL, - 1, PPC_ELF_MACHINE, 0, 0); + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); entry = elf_entry; } /* XXX try again as binary */ diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 623842f806..f3a4b4235d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3022,13 +3022,13 @@ static void spapr_machine_init(MachineState *machine) spapr->kernel_size = load_elf(kernel_filename, NULL, translate_kernel_address, spapr, - NULL, &loaded_addr, NULL, NULL, 1, - PPC_ELF_MACHINE, 0, 0); + NULL, &loaded_addr, NULL, NULL, + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); if (spapr->kernel_size == ELF_LOAD_WRONG_ENDIAN) { spapr->kernel_size = load_elf(kernel_filename, NULL, translate_kernel_address, spapr, - NULL, &loaded_addr, NULL, NULL, 0, - PPC_ELF_MACHINE, 0, 0); + NULL, &loaded_addr, NULL, NULL, + ELFDATA2LSB, PPC_ELF_MACHINE, 0, 0); spapr->kernel_le = spapr->kernel_size > 0; } if (spapr->kernel_size < 0) { diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index ea7ab8a569..2323811927 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -242,8 +242,8 @@ static void virtex_init(MachineState *machine) /* Boots a kernel elf binary. */ kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, - &entry, NULL, &high, NULL, 1, PPC_ELF_MACHINE, - 0, 0); + &entry, NULL, &high, NULL, + ELFDATA2MSB, PPC_ELF_MACHINE, 0, 0); boot_info.bootstrap_pc = entry & 0x00ffffff; if (kernel_size < 0) { diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 90e75c69a0..c309441b7d 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -246,7 +246,8 @@ void riscv_load_kernel(MachineState *machine, */ kernel_size = load_elf_ram_sym(kernel_filename, NULL, NULL, NULL, NULL, &info->image_low_addr, &info->image_high_addr, - NULL, 0, EM_RISCV, 1, 0, NULL, true, sym_cb); + NULL, ELFDATA2LSB, EM_RISCV, + 1, 0, NULL, true, sym_cb); if (kernel_size > 0) { info->kernel_size = kernel_size; goto out; diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c index 02fdbdf824..88c8f12c10 100644 --- a/hw/rx/rx-gdbsim.c +++ b/hw/rx/rx-gdbsim.c @@ -127,7 +127,7 @@ static void rx_gdbsim_init(MachineState *machine) * the latter half of the SDRAM space. */ kernel_offset = machine->ram_size / 2; - rx_load_image(RX_CPU(first_cpu), kernel_filename, + rx_load_image(&s->mcu.cpu, kernel_filename, SDRAM_BASE + kernel_offset, kernel_offset); if (dtb_filename) { ram_addr_t dtb_offset; @@ -153,7 +153,7 @@ static void rx_gdbsim_init(MachineState *machine) qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds, rom_ptr(SDRAM_BASE + dtb_offset, dtb_size)); /* Set dtb address to R1 */ - RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset; + s->mcu.cpu.env.regs[1] = SDRAM_BASE + dtb_offset; } } } diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index 4aa21c91fc..ce6f6078d7 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -162,8 +162,8 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp) bios_size = load_elf(bios_filename, NULL, bios_translate_addr, &fwbase, - &ipl->bios_start_addr, NULL, NULL, NULL, 1, - EM_S390, 0, 0); + &ipl->bios_start_addr, NULL, NULL, NULL, + ELFDATA2MSB, EM_S390, 0, 0); if (bios_size > 0) { /* Adjust ELF start address to final location */ ipl->bios_start_addr += fwbase; @@ -187,7 +187,7 @@ static void s390_ipl_realize(DeviceState *dev, Error **errp) if (ipl->kernel) { kernel_size = load_elf(ipl->kernel, NULL, NULL, NULL, &pentry, NULL, - NULL, NULL, 1, EM_S390, 0, 0); + NULL, NULL, ELFDATA2MSB, EM_S390, 0, 0); if (kernel_size < 0) { kernel_size = load_image_targphys(ipl->kernel, 0, ms->ram_size); if (kernel_size < 0) { diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c index 1d4e30e6b7..bbe7b971bb 100644 --- a/hw/sd/omap_mmc.c +++ b/hw/sd/omap_mmc.c @@ -21,17 +21,22 @@ #include "qemu/osdep.h" #include "qemu/log.h" +#include "qapi/error.h" #include "hw/irq.h" +#include "hw/sysbus.h" #include "hw/arm/omap.h" -#include "hw/sd/sdcard_legacy.h" +#include "hw/sd/sd.h" + +typedef struct OMAPMMCState { + SysBusDevice parent_obj; + + SDBus sdbus; -struct omap_mmc_s { qemu_irq irq; - qemu_irq *dma; - qemu_irq coverswitch; + qemu_irq dma_tx_gpio; + qemu_irq dma_rx_gpio; MemoryRegion iomem; omap_clk clk; - SDState *card; uint16_t last_cmd; uint16_t sdio; uint16_t rsp[8]; @@ -64,16 +69,15 @@ struct omap_mmc_s { int cdet_wakeup; int cdet_enable; - int cdet_state; qemu_irq cdet; -}; +} OMAPMMCState; -static void omap_mmc_interrupts_update(struct omap_mmc_s *s) +static void omap_mmc_interrupts_update(OMAPMMCState *s) { qemu_set_irq(s->irq, !!(s->status & s->mask)); } -static void omap_mmc_fifolevel_update(struct omap_mmc_s *host) +static void omap_mmc_fifolevel_update(OMAPMMCState *host) { if (!host->transfer && !host->fifo_len) { host->status &= 0xf3ff; @@ -83,33 +87,33 @@ static void omap_mmc_fifolevel_update(struct omap_mmc_s *host) if (host->fifo_len > host->af_level && host->ddir) { if (host->rx_dma) { host->status &= 0xfbff; - qemu_irq_raise(host->dma[1]); + qemu_irq_raise(host->dma_rx_gpio); } else host->status |= 0x0400; } else { host->status &= 0xfbff; - qemu_irq_lower(host->dma[1]); + qemu_irq_lower(host->dma_rx_gpio); } if (host->fifo_len < host->ae_level && !host->ddir) { if (host->tx_dma) { host->status &= 0xf7ff; - qemu_irq_raise(host->dma[0]); + qemu_irq_raise(host->dma_tx_gpio); } else host->status |= 0x0800; } else { - qemu_irq_lower(host->dma[0]); + qemu_irq_lower(host->dma_tx_gpio); host->status &= 0xf7ff; } } /* These must match the encoding of the MMC_CMD Response field */ typedef enum { - sd_nore = 0, /* no response */ - sd_r1, /* normal response command */ - sd_r2, /* CID, CSD registers */ - sd_r3, /* OCR register */ - sd_r6 = 6, /* Published RCA response */ + sd_nore = 0, /* no response */ + sd_r1, /* normal response command */ + sd_r2, /* CID, CSD registers */ + sd_r3, /* OCR register */ + sd_r6 = 6, /* Published RCA response */ sd_r1b = -1, } sd_rsp_type_t; @@ -121,7 +125,7 @@ typedef enum { SD_TYPE_ADTC = 3, /* addressed with data transfer */ } MMCCmdType; -static void omap_mmc_command(struct omap_mmc_s *host, int cmd, int dir, +static void omap_mmc_command(OMAPMMCState *host, int cmd, int dir, MMCCmdType type, int busy, sd_rsp_type_t resptype, int init) { @@ -153,7 +157,7 @@ static void omap_mmc_command(struct omap_mmc_s *host, int cmd, int dir, request.arg = host->arg; request.crc = 0; /* FIXME */ - rsplen = sd_do_command(host->card, &request, response); + rsplen = sdbus_do_command(&host->sdbus, &request, response); /* TODO: validate CRCs */ switch (resptype) { @@ -225,12 +229,12 @@ static void omap_mmc_command(struct omap_mmc_s *host, int cmd, int dir, if (timeout) host->status |= 0x0080; else if (cmd == 12) - host->status |= 0x0005; /* Makes it more real */ + host->status |= 0x0005; /* Makes it more real */ else host->status |= 0x0001; } -static void omap_mmc_transfer(struct omap_mmc_s *host) +static void omap_mmc_transfer(OMAPMMCState *host) { uint8_t value; @@ -242,10 +246,10 @@ static void omap_mmc_transfer(struct omap_mmc_s *host) if (host->fifo_len > host->af_level) break; - value = sd_read_byte(host->card); + value = sdbus_read_byte(&host->sdbus); host->fifo[(host->fifo_start + host->fifo_len) & 31] = value; if (-- host->blen_counter) { - value = sd_read_byte(host->card); + value = sdbus_read_byte(&host->sdbus); host->fifo[(host->fifo_start + host->fifo_len) & 31] |= value << 8; host->blen_counter --; @@ -257,10 +261,10 @@ static void omap_mmc_transfer(struct omap_mmc_s *host) break; value = host->fifo[host->fifo_start] & 0xff; - sd_write_byte(host->card, value); + sdbus_write_byte(&host->sdbus, value); if (-- host->blen_counter) { value = host->fifo[host->fifo_start] >> 8; - sd_write_byte(host->card, value); + sdbus_write_byte(&host->sdbus, value); host->blen_counter --; } @@ -285,19 +289,19 @@ static void omap_mmc_transfer(struct omap_mmc_s *host) static void omap_mmc_update(void *opaque) { - struct omap_mmc_s *s = opaque; + OMAPMMCState *s = opaque; omap_mmc_transfer(s); omap_mmc_fifolevel_update(s); omap_mmc_interrupts_update(s); } -static void omap_mmc_pseudo_reset(struct omap_mmc_s *host) +static void omap_mmc_pseudo_reset(OMAPMMCState *host) { host->status = 0; host->fifo_len = 0; } -void omap_mmc_reset(struct omap_mmc_s *host) +static void omap_mmc_reset(OMAPMMCState *host) { host->last_cmd = 0; memset(host->rsp, 0, sizeof(host->rsp)); @@ -319,54 +323,47 @@ void omap_mmc_reset(struct omap_mmc_s *host) host->transfer = 0; host->cdet_wakeup = 0; host->cdet_enable = 0; - qemu_set_irq(host->coverswitch, host->cdet_state); host->clkdiv = 0; omap_mmc_pseudo_reset(host); - - /* Since we're still using the legacy SD API the card is not plugged - * into any bus, and we must reset it manually. When omap_mmc is - * QOMified this must move into the QOM reset function. - */ - device_cold_reset(DEVICE(host->card)); } static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size) { uint16_t i; - struct omap_mmc_s *s = opaque; + OMAPMMCState *s = opaque; if (size != 2) { return omap_badwidth_read16(opaque, offset); } switch (offset) { - case 0x00: /* MMC_CMD */ + case 0x00: /* MMC_CMD */ return s->last_cmd; - case 0x04: /* MMC_ARGL */ + case 0x04: /* MMC_ARGL */ return s->arg & 0x0000ffff; - case 0x08: /* MMC_ARGH */ + case 0x08: /* MMC_ARGH */ return s->arg >> 16; - case 0x0c: /* MMC_CON */ + case 0x0c: /* MMC_CON */ return (s->dw << 15) | (s->mode << 12) | (s->enable << 11) | (s->be << 10) | s->clkdiv; - case 0x10: /* MMC_STAT */ + case 0x10: /* MMC_STAT */ return s->status; - case 0x14: /* MMC_IE */ + case 0x14: /* MMC_IE */ return s->mask; - case 0x18: /* MMC_CTO */ + case 0x18: /* MMC_CTO */ return s->cto; - case 0x1c: /* MMC_DTO */ + case 0x1c: /* MMC_DTO */ return s->dto; - case 0x20: /* MMC_DATA */ + case 0x20: /* MMC_DATA */ /* TODO: support 8-bit access */ i = s->fifo[s->fifo_start]; if (s->fifo_len == 0) { @@ -381,42 +378,42 @@ static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size) omap_mmc_interrupts_update(s); return i; - case 0x24: /* MMC_BLEN */ + case 0x24: /* MMC_BLEN */ return s->blen_counter; - case 0x28: /* MMC_NBLK */ + case 0x28: /* MMC_NBLK */ return s->nblk_counter; - case 0x2c: /* MMC_BUF */ + case 0x2c: /* MMC_BUF */ return (s->rx_dma << 15) | (s->af_level << 8) | (s->tx_dma << 7) | s->ae_level; - case 0x30: /* MMC_SPI */ + case 0x30: /* MMC_SPI */ return 0x0000; - case 0x34: /* MMC_SDIO */ + case 0x34: /* MMC_SDIO */ return (s->cdet_wakeup << 2) | (s->cdet_enable) | s->sdio; - case 0x38: /* MMC_SYST */ + case 0x38: /* MMC_SYST */ return 0x0000; - case 0x3c: /* MMC_REV */ + case 0x3c: /* MMC_REV */ return s->rev; - case 0x40: /* MMC_RSP0 */ - case 0x44: /* MMC_RSP1 */ - case 0x48: /* MMC_RSP2 */ - case 0x4c: /* MMC_RSP3 */ - case 0x50: /* MMC_RSP4 */ - case 0x54: /* MMC_RSP5 */ - case 0x58: /* MMC_RSP6 */ - case 0x5c: /* MMC_RSP7 */ + case 0x40: /* MMC_RSP0 */ + case 0x44: /* MMC_RSP1 */ + case 0x48: /* MMC_RSP2 */ + case 0x4c: /* MMC_RSP3 */ + case 0x50: /* MMC_RSP4 */ + case 0x54: /* MMC_RSP5 */ + case 0x58: /* MMC_RSP6 */ + case 0x5c: /* MMC_RSP7 */ return s->rsp[(offset - 0x40) >> 2]; /* OMAP2-specific */ - case 0x60: /* MMC_IOSR */ - case 0x64: /* MMC_SYSC */ + case 0x60: /* MMC_IOSR */ + case 0x64: /* MMC_SYSC */ return 0; - case 0x68: /* MMC_SYSS */ - return 1; /* RSTD */ + case 0x68: /* MMC_SYSS */ + return 1; /* RSTD */ } OMAP_BAD_REG(offset); @@ -427,7 +424,7 @@ static void omap_mmc_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { int i; - struct omap_mmc_s *s = opaque; + OMAPMMCState *s = opaque; if (size != 2) { omap_badwidth_write16(opaque, offset, value); @@ -435,7 +432,7 @@ static void omap_mmc_write(void *opaque, hwaddr offset, } switch (offset) { - case 0x00: /* MMC_CMD */ + case 0x00: /* MMC_CMD */ if (!s->enable) break; @@ -450,17 +447,17 @@ static void omap_mmc_write(void *opaque, hwaddr offset, omap_mmc_update(s); break; - case 0x04: /* MMC_ARGL */ + case 0x04: /* MMC_ARGL */ s->arg &= 0xffff0000; s->arg |= 0x0000ffff & value; break; - case 0x08: /* MMC_ARGH */ + case 0x08: /* MMC_ARGH */ s->arg &= 0x0000ffff; s->arg |= value << 16; break; - case 0x0c: /* MMC_CON */ + case 0x0c: /* MMC_CON */ s->dw = (value >> 15) & 1; s->mode = (value >> 12) & 3; s->enable = (value >> 11) & 1; @@ -480,27 +477,27 @@ static void omap_mmc_write(void *opaque, hwaddr offset, omap_mmc_pseudo_reset(s); break; - case 0x10: /* MMC_STAT */ + case 0x10: /* MMC_STAT */ s->status &= ~value; omap_mmc_interrupts_update(s); break; - case 0x14: /* MMC_IE */ + case 0x14: /* MMC_IE */ s->mask = value & 0x7fff; omap_mmc_interrupts_update(s); break; - case 0x18: /* MMC_CTO */ + case 0x18: /* MMC_CTO */ s->cto = value & 0xff; if (s->cto > 0xfd && s->rev <= 1) printf("MMC: CTO of 0xff and 0xfe cannot be used!\n"); break; - case 0x1c: /* MMC_DTO */ + case 0x1c: /* MMC_DTO */ s->dto = value & 0xffff; break; - case 0x20: /* MMC_DATA */ + case 0x20: /* MMC_DATA */ /* TODO: support 8-bit access */ if (s->fifo_len == 32) break; @@ -511,18 +508,18 @@ static void omap_mmc_write(void *opaque, hwaddr offset, omap_mmc_interrupts_update(s); break; - case 0x24: /* MMC_BLEN */ + case 0x24: /* MMC_BLEN */ s->blen = (value & 0x07ff) + 1; s->blen_counter = s->blen; break; - case 0x28: /* MMC_NBLK */ + case 0x28: /* MMC_NBLK */ s->nblk = (value & 0x07ff) + 1; s->nblk_counter = s->nblk; s->blen_counter = s->blen; break; - case 0x2c: /* MMC_BUF */ + case 0x2c: /* MMC_BUF */ s->rx_dma = (value >> 15) & 1; s->af_level = (value >> 8) & 0x1f; s->tx_dma = (value >> 7) & 1; @@ -537,38 +534,38 @@ static void omap_mmc_write(void *opaque, hwaddr offset, break; /* SPI, SDIO and TEST modes unimplemented */ - case 0x30: /* MMC_SPI (OMAP1 only) */ + case 0x30: /* MMC_SPI (OMAP1 only) */ break; - case 0x34: /* MMC_SDIO */ + case 0x34: /* MMC_SDIO */ s->sdio = value & (s->rev >= 2 ? 0xfbf3 : 0x2020); s->cdet_wakeup = (value >> 9) & 1; s->cdet_enable = (value >> 2) & 1; break; - case 0x38: /* MMC_SYST */ + case 0x38: /* MMC_SYST */ break; - case 0x3c: /* MMC_REV */ - case 0x40: /* MMC_RSP0 */ - case 0x44: /* MMC_RSP1 */ - case 0x48: /* MMC_RSP2 */ - case 0x4c: /* MMC_RSP3 */ - case 0x50: /* MMC_RSP4 */ - case 0x54: /* MMC_RSP5 */ - case 0x58: /* MMC_RSP6 */ - case 0x5c: /* MMC_RSP7 */ + case 0x3c: /* MMC_REV */ + case 0x40: /* MMC_RSP0 */ + case 0x44: /* MMC_RSP1 */ + case 0x48: /* MMC_RSP2 */ + case 0x4c: /* MMC_RSP3 */ + case 0x50: /* MMC_RSP4 */ + case 0x54: /* MMC_RSP5 */ + case 0x58: /* MMC_RSP6 */ + case 0x5c: /* MMC_RSP7 */ OMAP_RO_REG(offset); break; /* OMAP2-specific */ - case 0x60: /* MMC_IOSR */ + case 0x60: /* MMC_IOSR */ if (value & 0xf) printf("MMC: SDIO bits used!\n"); break; - case 0x64: /* MMC_SYSC */ - if (value & (1 << 2)) /* SRTS */ + case 0x64: /* MMC_SYSC */ + if (value & (1 << 2)) /* SRTS */ omap_mmc_reset(s); break; - case 0x68: /* MMC_SYSS */ + case 0x68: /* MMC_SYSS */ OMAP_RO_REG(offset); break; @@ -583,29 +580,56 @@ static const MemoryRegionOps omap_mmc_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -struct omap_mmc_s *omap_mmc_init(hwaddr base, - MemoryRegion *sysmem, - BlockBackend *blk, - qemu_irq irq, qemu_irq dma[], omap_clk clk) +void omap_mmc_set_clk(DeviceState *dev, omap_clk clk) { - struct omap_mmc_s *s = g_new0(struct omap_mmc_s, 1); + OMAPMMCState *s = OMAP_MMC(dev); - s->irq = irq; - s->dma = dma; s->clk = clk; - s->lines = 1; /* TODO: needs to be settable per-board */ - s->rev = 1; +} - memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc", 0x800); - memory_region_add_subregion(sysmem, base, &s->iomem); - - /* Instantiate the storage */ - s->card = sd_init(blk, false); - if (s->card == NULL) { - exit(1); - } +static void omap_mmc_reset_hold(Object *obj, ResetType type) +{ + OMAPMMCState *s = OMAP_MMC(obj); omap_mmc_reset(s); - - return s; } + +static void omap_mmc_initfn(Object *obj) +{ + OMAPMMCState *s = OMAP_MMC(obj); + + /* In theory these could be settable per-board */ + s->lines = 1; + s->rev = 1; + + memory_region_init_io(&s->iomem, obj, &omap_mmc_ops, s, "omap.mmc", 0x800); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem); + + sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); + qdev_init_gpio_out_named(DEVICE(obj), &s->dma_tx_gpio, "dma-tx", 1); + qdev_init_gpio_out_named(DEVICE(obj), &s->dma_rx_gpio, "dma-rx", 1); + + qbus_init(&s->sdbus, sizeof(s->sdbus), TYPE_SD_BUS, DEVICE(obj), "sd-bus"); +} + +static void omap_mmc_class_init(ObjectClass *oc, void *data) +{ + ResettableClass *rc = RESETTABLE_CLASS(oc); + + rc->phases.hold = omap_mmc_reset_hold; +} + +static const TypeInfo omap_mmc_info = { + .name = TYPE_OMAP_MMC, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(OMAPMMCState), + .instance_init = omap_mmc_initfn, + .class_init = omap_mmc_class_init, +}; + +static void omap_mmc_register_types(void) +{ + type_register_static(&omap_mmc_info); +} + +type_init(omap_mmc_register_types) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 0330d432fd..e541c57f8c 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -39,7 +39,6 @@ #include "hw/registerfields.h" #include "system/block-backend.h" #include "hw/sd/sd.h" -#include "hw/sd/sdcard_legacy.h" #include "migration/vmstate.h" #include "qapi/error.h" #include "qemu/bitmap.h" @@ -120,10 +119,6 @@ typedef struct SDProto { struct SDState { DeviceState parent_obj; - /* If true, created by sd_init() for a non-qdevified caller */ - /* TODO purge them with fire */ - bool me_no_qdev_me_kill_mammoth_with_rocks; - /* SD Memory Card Registers */ uint32_t ocr; uint8_t scr[8]; @@ -177,10 +172,7 @@ struct SDState { uint32_t data_offset; size_t data_size; uint8_t data[512]; - qemu_irq readonly_cb; - qemu_irq inserted_cb; QEMUTimer *ocr_power_timer; - bool enable; uint8_t dat_lines; bool cmd_line; }; @@ -299,12 +291,12 @@ static const char *sd_acmd_name(SDState *sd, uint8_t cmd) static uint8_t sd_get_dat_lines(SDState *sd) { - return sd->enable ? sd->dat_lines : 0; + return sd->dat_lines; } static bool sd_get_cmd_line(SDState *sd) { - return sd->enable ? sd->cmd_line : false; + return sd->cmd_line; } static void sd_set_voltage(SDState *sd, uint16_t millivolts) @@ -892,17 +884,10 @@ static void sd_cardchange(void *opaque, bool load, Error **errp) trace_sdcard_ejected(); } - if (sd->me_no_qdev_me_kill_mammoth_with_rocks) { - qemu_set_irq(sd->inserted_cb, inserted); - if (inserted) { - qemu_set_irq(sd->readonly_cb, readonly); - } - } else { - sdbus = SD_BUS(qdev_get_parent_bus(dev)); - sdbus_set_inserted(sdbus, inserted); - if (inserted) { - sdbus_set_readonly(sdbus, readonly); - } + sdbus = SD_BUS(qdev_get_parent_bus(dev)); + sdbus_set_inserted(sdbus, inserted); + if (inserted) { + sdbus_set_readonly(sdbus, readonly); } } @@ -990,7 +975,7 @@ static const VMStateDescription sd_vmstate = { VMSTATE_UINT32(data_offset, SDState), VMSTATE_UINT8_ARRAY(data, SDState, 512), VMSTATE_UNUSED_V(1, 512), - VMSTATE_BOOL(enable, SDState), + VMSTATE_UNUSED(1), VMSTATE_END_OF_LIST() }, .subsections = (const VMStateDescription * const []) { @@ -1000,48 +985,6 @@ static const VMStateDescription sd_vmstate = { }, }; -/* Legacy initialization function for use by non-qdevified callers */ -SDState *sd_init(BlockBackend *blk, bool is_spi) -{ - Object *obj; - DeviceState *dev; - SDState *sd; - Error *err = NULL; - - obj = object_new(is_spi ? TYPE_SD_CARD_SPI : TYPE_SD_CARD); - dev = DEVICE(obj); - if (!qdev_prop_set_drive_err(dev, "drive", blk, &err)) { - error_reportf_err(err, "sd_init failed: "); - return NULL; - } - - /* - * Realizing the device properly would put it into the QOM - * composition tree even though it is not plugged into an - * appropriate bus. That's a no-no. Hide the device from - * QOM/qdev, and call its qdev realize callback directly. - */ - object_ref(obj); - object_unparent(obj); - sd_realize(dev, &err); - if (err) { - error_reportf_err(err, "sd_init failed: "); - return NULL; - } - - sd = SD_CARD(dev); - sd->me_no_qdev_me_kill_mammoth_with_rocks = true; - return sd; -} - -void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert) -{ - sd->readonly_cb = readonly; - sd->inserted_cb = insert; - qemu_set_irq(readonly, sd->blk ? !blk_is_writable(sd->blk) : 0); - qemu_set_irq(insert, sd->blk ? blk_is_inserted(sd->blk) : 0); -} - static void sd_blk_read(SDState *sd, uint64_t addr, uint32_t len) { trace_sdcard_read_block(addr, len); @@ -2196,13 +2139,13 @@ static bool cmd_valid_while_locked(SDState *sd, unsigned cmd) return cmd_class == 0 || cmd_class == 7; } -int sd_do_command(SDState *sd, SDRequest *req, - uint8_t *response) { +static int sd_do_command(SDState *sd, SDRequest *req, + uint8_t *response) { int last_state; sd_rsp_type_t rtype; int rsplen; - if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable) { + if (!sd->blk || !blk_is_inserted(sd->blk)) { return 0; } @@ -2349,12 +2292,13 @@ static bool sd_generic_read_byte(SDState *sd, uint8_t *value) return false; } -void sd_write_byte(SDState *sd, uint8_t value) +static void sd_write_byte(SDState *sd, uint8_t value) { int i; - if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable) + if (!sd->blk || !blk_is_inserted(sd->blk)) { return; + } if (sd->state != sd_receivingdata_state) { qemu_log_mask(LOG_GUEST_ERROR, @@ -2478,15 +2422,16 @@ void sd_write_byte(SDState *sd, uint8_t value) } } -uint8_t sd_read_byte(SDState *sd) +static uint8_t sd_read_byte(SDState *sd) { /* TODO: Append CRCs */ const uint8_t dummy_byte = 0x00; uint8_t ret; uint32_t io_len; - if (!sd->blk || !blk_is_inserted(sd->blk) || !sd->enable) + if (!sd->blk || !blk_is_inserted(sd->blk)) { return dummy_byte; + } if (sd->state != sd_sendingdata_state) { qemu_log_mask(LOG_GUEST_ERROR, @@ -2561,11 +2506,6 @@ static bool sd_data_ready(SDState *sd) return sd->state == sd_sendingdata_state; } -void sd_enable(SDState *sd, bool enable) -{ - sd->enable = enable; -} - static const SDProto sd_proto_spi = { .name = "SPI", .cmd = { @@ -2725,7 +2665,6 @@ static void sd_instance_init(Object *obj) sd->proto = sc->proto; sd->last_cmd_name = "UNSET"; - sd->enable = true; sd->ocr_power_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sd_ocr_powerup, sd); } @@ -2831,7 +2770,6 @@ static void sdmmc_common_class_init(ObjectClass *klass, void *data) sc->read_byte = sd_read_byte; sc->receive_ready = sd_receive_ready; sc->data_ready = sd_data_ready; - sc->enable = sd_enable; sc->get_inserted = sd_get_inserted; sc->get_readonly = sd_get_readonly; } diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 2fa439819e..d68c94e82e 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -63,6 +63,12 @@ #define PA_VERREG 0x32 #define PA_OUTPORT 0x36 +enum r2d_fpga_irq { + PCI_INTD, CF_IDE, CF_CD, PCI_INTC, SM501, KEY, RTC_A, RTC_T, + SDCARD, PCI_INTA, PCI_INTB, EXT, TP, + NR_IRQS +}; + typedef struct { uint16_t bcr; uint16_t irlmsk; @@ -88,15 +94,10 @@ typedef struct { /* output pin */ qemu_irq irl; + IRQState irq[NR_IRQS]; MemoryRegion iomem; } r2d_fpga_t; -enum r2d_fpga_irq { - PCI_INTD, CF_IDE, CF_CD, PCI_INTC, SM501, KEY, RTC_A, RTC_T, - SDCARD, PCI_INTA, PCI_INTB, EXT, TP, - NR_IRQS -}; - static const struct { short irl; uint16_t msk; } irqtab[NR_IRQS] = { [CF_IDE] = { 1, 1 << 9 }, [CF_CD] = { 2, 1 << 8 }, @@ -186,8 +187,8 @@ static const MemoryRegionOps r2d_fpga_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem, - hwaddr base, qemu_irq irl) +static r2d_fpga_t *r2d_fpga_init(MemoryRegion *sysmem, + hwaddr base, qemu_irq irl) { r2d_fpga_t *s; @@ -197,7 +198,10 @@ static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem, memory_region_init_io(&s->iomem, NULL, &r2d_fpga_ops, s, "r2d-fpga", 0x40); memory_region_add_subregion(sysmem, base, &s->iomem); - return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS); + + qemu_init_irqs(s->irq, NR_IRQS, r2d_fpga_irq_set, s); + + return s; } typedef struct ResetData { @@ -239,13 +243,13 @@ static void r2d_init(MachineState *machine) ResetData *reset_info; struct SH7750State *s; MemoryRegion *sdram = g_new(MemoryRegion, 1); - qemu_irq *irq; DriveInfo *dinfo; DeviceState *dev; SysBusDevice *busdev; MemoryRegion *address_space_mem = get_system_memory(); PCIBus *pci_bus; USBBus *usb_bus; + r2d_fpga_t *fpga; cpu = SUPERH_CPU(cpu_create(machine->cpu_type)); env = &cpu->env; @@ -260,7 +264,7 @@ static void r2d_init(MachineState *machine) memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram); /* Register peripherals */ s = sh7750_init(cpu, address_space_mem); - irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s)); + fpga = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s)); dev = qdev_new("sh_pci"); busdev = SYS_BUS_DEVICE(dev); @@ -268,10 +272,10 @@ static void r2d_init(MachineState *machine) pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci")); sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000)); sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000)); - sysbus_connect_irq(busdev, 0, irq[PCI_INTA]); - sysbus_connect_irq(busdev, 1, irq[PCI_INTB]); - sysbus_connect_irq(busdev, 2, irq[PCI_INTC]); - sysbus_connect_irq(busdev, 3, irq[PCI_INTD]); + sysbus_connect_irq(busdev, 0, &fpga->irq[PCI_INTA]); + sysbus_connect_irq(busdev, 1, &fpga->irq[PCI_INTB]); + sysbus_connect_irq(busdev, 2, &fpga->irq[PCI_INTC]); + sysbus_connect_irq(busdev, 3, &fpga->irq[PCI_INTD]); dev = qdev_new("sysbus-sm501"); busdev = SYS_BUS_DEVICE(dev); @@ -281,13 +285,13 @@ static void r2d_init(MachineState *machine) sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0x10000000); sysbus_mmio_map(busdev, 1, 0x13e00000); - sysbus_connect_irq(busdev, 0, irq[SM501]); + sysbus_connect_irq(busdev, 0, &fpga->irq[SM501]); /* onboard CF (True IDE mode, Master only). */ dinfo = drive_get(IF_IDE, 0, 0); dev = qdev_new("mmio-ide"); busdev = SYS_BUS_DEVICE(dev); - sysbus_connect_irq(busdev, 0, irq[CF_IDE]); + sysbus_connect_irq(busdev, 0, &fpga->irq[CF_IDE]); qdev_prop_set_uint32(dev, "shift", 1); sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, 0x14001000); diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 84381254ad..0aeaad3bec 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -380,7 +380,7 @@ static void leon3_generic_hw_init(MachineState *machine) kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &entry, NULL, NULL, NULL, - 1 /* big endian */, EM_SPARC, 0, 0); + ELFDATA2MSB, EM_SPARC, 0, 0); if (kernel_size < 0) { kernel_size = load_uimage(kernel_filename, NULL, &entry, NULL, NULL, NULL); diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index e070360a2c..a48d3622c5 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -242,7 +242,8 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename, #endif kernel_size = load_elf(kernel_filename, NULL, translate_kernel_address, NULL, - NULL, NULL, NULL, NULL, 1, EM_SPARC, 0, 0); + NULL, NULL, NULL, NULL, + ELFDATA2MSB, EM_SPARC, 0, 0); if (kernel_size < 0) kernel_size = load_aout(kernel_filename, KERNEL_LOAD_ADDR, RAM_size - KERNEL_LOAD_ADDR, bswap_needed, @@ -703,7 +704,7 @@ static void prom_init(hwaddr addr, const char *bios_name) if (filename) { ret = load_elf(filename, NULL, translate_prom_address, &addr, NULL, - NULL, NULL, NULL, 1, EM_SPARC, 0, 0); + NULL, NULL, NULL, ELFDATA2MSB, EM_SPARC, 0, 0); if (ret < 0 || ret > PROM_SIZE_MAX) { ret = load_image_targphys(filename, addr, PROM_SIZE_MAX); } diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 0980b44659..8ab5cf0461 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -176,8 +176,8 @@ static uint64_t sun4u_load_kernel(const char *kernel_filename, bswap_needed = 0; #endif kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, kernel_entry, - kernel_addr, &kernel_top, NULL, 1, EM_SPARCV9, 0, - 0); + kernel_addr, &kernel_top, NULL, + ELFDATA2MSB, EM_SPARCV9, 0, 0); if (kernel_size < 0) { *kernel_addr = KERNEL_LOAD_ADDR; *kernel_entry = KERNEL_LOAD_ADDR; @@ -441,7 +441,7 @@ static void prom_init(hwaddr addr, const char *bios_name) filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); if (filename) { ret = load_elf(filename, NULL, translate_prom_address, &addr, - NULL, NULL, NULL, NULL, 1, EM_SPARCV9, 0, 0); + NULL, NULL, NULL, NULL, ELFDATA2MSB, EM_SPARCV9, 0, 0); if (ret < 0 || ret > PROM_SIZE_MAX) { ret = load_image_targphys(filename, addr, PROM_SIZE_MAX); } diff --git a/hw/tricore/triboard.c b/hw/tricore/triboard.c index 9cc8d282ff..f5baa8ccbb 100644 --- a/hw/tricore/triboard.c +++ b/hw/tricore/triboard.c @@ -39,7 +39,7 @@ static void tricore_load_kernel(TriCoreCPU *cpu, const char *kernel_filename) kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &entry, NULL, - NULL, NULL, 0, + NULL, NULL, ELFDATA2LSB, EM_TRICORE, 1, 0); if (kernel_size <= 0) { error_report("no kernel file '%s'", kernel_filename); diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c index c29db8b451..3facfdfd61 100644 --- a/hw/tricore/tricore_testboard.c +++ b/hw/tricore/tricore_testboard.c @@ -42,7 +42,7 @@ static void tricore_load_kernel(CPUTriCoreState *env) kernel_size = load_elf(tricoretb_binfo.kernel_filename, NULL, NULL, NULL, &entry, NULL, - NULL, NULL, 0, + NULL, NULL, ELFDATA2LSB, EM_TRICORE, 1, 0); if (kernel_size <= 0) { error_report("no kernel file '%s'", diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index 6c4c14c895..b090f25365 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -2287,7 +2287,8 @@ static void ehci_work_bh(void *opaque) ehci_update_frindex(ehci, skipped_uframes); ehci->last_run_ns += UFRAME_TIMER_NS * skipped_uframes; uframes -= skipped_uframes; - DPRINTF("WARNING - EHCI skipped %d uframes\n", skipped_uframes); + DPRINTF("WARNING - EHCI skipped %"PRIu64" uframes\n", + skipped_uframes); } for (i = 0; i < uframes; i++) { diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c index 0a1fd90037..1cea29c66d 100644 --- a/hw/xtensa/sim.c +++ b/hw/xtensa/sim.c @@ -100,7 +100,8 @@ void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine) if (kernel_filename) { uint64_t elf_entry; int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu, - &elf_entry, NULL, NULL, NULL, TARGET_BIG_ENDIAN, + &elf_entry, NULL, NULL, NULL, + TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB, EM_XTENSA, 0, 0); if (success > 0) { diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 9efe91933f..3f3677f1c9 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -398,7 +398,8 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) uint64_t elf_entry; int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu, - &elf_entry, NULL, NULL, NULL, TARGET_BIG_ENDIAN, + &elf_entry, NULL, NULL, NULL, + TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB, EM_XTENSA, 0, 0); if (success > 0) { entry_point = elf_entry; diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index 420ed1d573..7cb87ea89c 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -529,12 +529,15 @@ struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem, omap_clk clk); /* omap_mmc.c */ -struct omap_mmc_s; -struct omap_mmc_s *omap_mmc_init(hwaddr base, - MemoryRegion *sysmem, - BlockBackend *blk, - qemu_irq irq, qemu_irq dma[], omap_clk clk); -void omap_mmc_reset(struct omap_mmc_s *s); +#define TYPE_OMAP_MMC "omap-mmc" +OBJECT_DECLARE_SIMPLE_TYPE(OMAPMMCState, OMAP_MMC) + +DeviceState *omap_mmc_init(hwaddr base, + MemoryRegion *sysmem, + qemu_irq irq, qemu_irq dma[], omap_clk clk); +/* TODO: clock framework (see above) */ +void omap_mmc_set_clk(DeviceState *dev, omap_clk clk); + /* omap_i2c.c */ I2CBus *omap_i2c_bus(DeviceState *omap_i2c); @@ -601,7 +604,7 @@ struct omap_mpu_state_s { /* MPU public TIPB peripherals */ struct omap_32khz_timer_s *os_timer; - struct omap_mmc_s *mmc; + DeviceState *mmc; struct omap_mpuio_s *mpuio; diff --git a/include/hw/ipack/ipack.h b/include/hw/ipack/ipack.h index cbcdda509d..00f397fd02 100644 --- a/include/hw/ipack/ipack.h +++ b/include/hw/ipack/ipack.h @@ -12,6 +12,7 @@ #define QEMU_IPACK_H #include "hw/qdev-core.h" +#include "hw/irq.h" #include "qom/object.h" @@ -19,10 +20,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(IPackBus, IPACK_BUS) struct IPackBus { - /*< private >*/ BusState parent_obj; - /* All fields are private */ uint8_t n_slots; uint8_t free_slot; qemu_irq_handler set_irq; @@ -58,13 +57,11 @@ struct IPackDeviceClass { }; struct IPackDevice { - /*< private >*/ DeviceState parent_obj; - /*< public >*/ int32_t slot; /* IRQ objects for the IndustryPack INT0# and INT1# */ - qemu_irq *irq; + IRQState irq[2]; }; extern const VMStateDescription vmstate_ipack_device; diff --git a/include/hw/irq.h b/include/hw/irq.h index c861c1debd..b3012237ac 100644 --- a/include/hw/irq.h +++ b/include/hw/irq.h @@ -41,6 +41,17 @@ static inline void qemu_irq_pulse(qemu_irq irq) void qemu_init_irq(IRQState *irq, qemu_irq_handler handler, void *opaque, int n); +/** + * qemu_init_irqs: Initialize an array of IRQs. + * + * @irq: Array of IRQs to initialize + * @count: number of IRQs to initialize + * @handler: handler to assign to each IRQ + * @opaque: opaque data to pass to @handler + */ +void qemu_init_irqs(IRQState irq[], size_t count, + qemu_irq_handler handler, void *opaque); + /* Returns an array of N IRQs. Each IRQ is assigned the argument handler and * opaque data. */ diff --git a/include/hw/loader.h b/include/hw/loader.h index 8985046be4..784a93d6c1 100644 --- a/include/hw/loader.h +++ b/include/hw/loader.h @@ -120,7 +120,7 @@ const char *load_elf_strerror(ssize_t error); * @lowaddr: Populated with lowest loaded address. Ignored if NULL. * @highaddr: Populated with highest loaded address. Ignored if NULL. * @pflags: Populated with ELF processor-specific flags. Ignore if NULL. - * @bigendian: Expected ELF endianness. 0 for LE otherwise BE + * @elf_data_order: Expected ELF endianness (ELFDATA2LSB or ELFDATA2MSB). * @elf_machine: Expected ELF machine type * @clear_lsb: Set to mask off LSB of addresses (Some architectures use * this for non-address data) @@ -151,30 +151,18 @@ ssize_t load_elf_ram_sym(const char *filename, uint64_t (*translate_fn)(void *, uint64_t), void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, uint64_t *highaddr, - uint32_t *pflags, int big_endian, int elf_machine, + uint32_t *pflags, int elf_data_order, int elf_machine, int clear_lsb, int data_swab, AddressSpace *as, bool load_rom, symbol_fn_t sym_cb); -/** load_elf_ram: - * Same as load_elf_ram_sym(), but doesn't allow the caller to specify a - * symbol callback function - */ -ssize_t load_elf_ram(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, - uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, - int big_endian, int elf_machine, int clear_lsb, - int data_swab, AddressSpace *as, bool load_rom); - /** load_elf_as: - * Same as load_elf_ram(), but always loads the elf as ROM + * Same as load_elf_ram_sym(), but always loads the elf as ROM */ ssize_t load_elf_as(const char *filename, uint64_t (*elf_note_fn)(void *, void *, bool), uint64_t (*translate_fn)(void *, uint64_t), void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, + uint64_t *highaddr, uint32_t *pflags, int elf_data_order, int elf_machine, int clear_lsb, int data_swab, AddressSpace *as); @@ -186,7 +174,7 @@ ssize_t load_elf(const char *filename, uint64_t (*elf_note_fn)(void *, void *, bool), uint64_t (*translate_fn)(void *, uint64_t), void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, + uint64_t *highaddr, uint32_t *pflags, int elf_data_order, int elf_machine, int clear_lsb, int data_swab); /** load_elf_hdr: diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index f2458f37b3..d6bad17513 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -119,7 +119,6 @@ struct SDCardClass { void (*set_voltage)(SDState *sd, uint16_t millivolts); uint8_t (*get_dat_lines)(SDState *sd); bool (*get_cmd_line)(SDState *sd); - void (*enable)(SDState *sd, bool enable); bool (*get_inserted)(SDState *sd); bool (*get_readonly)(SDState *sd); void (*set_cid)(SDState *sd); diff --git a/include/hw/sd/sdcard_legacy.h b/include/hw/sd/sdcard_legacy.h deleted file mode 100644 index 0dc3889555..0000000000 --- a/include/hw/sd/sdcard_legacy.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * SD Memory Card emulation (deprecated legacy API) - * - * Copyright (c) 2006 Andrzej Zaborowski - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef HW_SDCARD_LEGACY_H -#define HW_SDCARD_LEGACY_H - -#include "hw/sd/sd.h" - -/* Legacy functions to be used only by non-qdevified callers */ -SDState *sd_init(BlockBackend *blk, bool is_spi); -int sd_do_command(SDState *card, SDRequest *request, uint8_t *response); -void sd_write_byte(SDState *card, uint8_t value); -uint8_t sd_read_byte(SDState *card); -void sd_set_cb(SDState *card, qemu_irq readonly, qemu_irq insert); - -/* sd_enable should not be used -- it is only used on the nseries boards, - * where it is part of a broken implementation of the MMC card slot switch - * (there should be two card slots which are multiplexed to a single MMC - * controller, but instead we model it with one card and controller and - * disable the card when the second slot is selected, so it looks like the - * second slot is always empty). - */ -void sd_enable(SDState *card, bool enable); - -#endif /* HW_SDCARD_LEGACY_H */ diff --git a/tests/qtest/libqos/meson.build b/tests/qtest/libqos/meson.build index 46f130ccfd..1ddaf7b095 100644 --- a/tests/qtest/libqos/meson.build +++ b/tests/qtest/libqos/meson.build @@ -32,7 +32,6 @@ libqos_srcs = files( 'i2c-omap.c', 'igb.c', 'sdhci.c', - 'tpci200.c', 'virtio.c', 'virtio-balloon.c', 'virtio-blk.c', @@ -70,6 +69,9 @@ endif if config_all_devices.has_key('CONFIG_RISCV_IOMMU') libqos_srcs += files('riscv-iommu.c') endif +if config_all_devices.has_key('CONFIG_TPCI200') + libqos_srcs += files('tpci200.c') +endif libqos = static_library('qos', libqos_srcs + genh, build_by_default: false) diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 94b28e5a53..e60e92fe9d 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -286,7 +286,6 @@ qos_test_ss.add( 'e1000-test.c', 'eepro100-test.c', 'es1370-test.c', - 'ipoctal232-test.c', 'lsm303dlhc-mag-test.c', 'isl_pmbus_vr-test.c', 'max34451-test.c', @@ -317,6 +316,9 @@ qos_test_ss.add( if config_all_devices.has_key('CONFIG_VIRTIO_SERIAL') qos_test_ss.add(files('virtio-serial-test.c')) endif +if config_all_devices.has_key('CONFIG_IP_OCTAL_232') + qos_test_ss.add(files('ipoctal232-test.c')) +endif if host_os != 'windows' qos_test_ss.add(files('e1000e-test.c'))