motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-06 01:03:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/arm: Implement new VFP fp16 insn VMOVX

Browse source 
The fp16 extension includes a new instruction VMOVX, which copies the
upper 16 bits of a 32-bit source VFP register into the lower 16
bits of the destination and zeroes the high half of the destination.
Implement it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200828183354.27913-21-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2020-08-28 19:33:29 +01:00
parent e4875e3bcc
commit f61e5c43b8
2 changed files with 28 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

3
target/arm/vfp-uncond.decode
View file

@ -75,5 +75,8 @@ VCVT 1111 1110 1.11 11 rm:2 .... 1010 op:1 1.0 .... \
VCVT 1111 1110 1.11 11 rm:2 .... 1011 op:1 1.0 .... \
vm=%vm_dp vd=%vd_sp sz=3
VMOVX 1111 1110 1.11 0000 .... 1010 01 . 0 .... \
vd=%vd_sp vm=%vm_sp
VINS 1111 1110 1.11 0000 .... 1010 11 . 0 .... \
vd=%vd_sp vm=%vm_sp