s390/cpu: split CPU reset into architectured functions

s390 provides several CPU resets:
- CPU reset, clears interrupts, stop processing, clears TLB, but does
  not touch registers
- initial CPU reset, like CPU reset, but also clears PSW, prefix, FPC,
  timer and control registers. It does not touch gprs, fprs and acrs (!)
- Power on reset: the full monty

wire up CPUClass reset to the full monty, but provide the lesser resets
as part of S390CPUClass.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
This commit is contained in:
Christian Borntraeger 2013-06-28 10:51:09 +02:00
parent 29c6157ca7
commit f5ae2a4fd8
2 changed files with 39 additions and 3 deletions

View file

@ -37,6 +37,8 @@
* @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
* @load_normal: Performs a load normal.
* @cpu_reset: Performs a CPU reset.
* @initial_cpu_reset: Performs an initial CPU reset.
*
* An S/390 CPU model.
*/
@ -48,6 +50,8 @@ typedef struct S390CPUClass {
DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
void (*load_normal)(CPUState *cpu);
void (*cpu_reset)(CPUState *cpu);
void (*initial_cpu_reset)(CPUState *cpu);
} S390CPUClass;
/**