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docs/devel/qtest: Include protocol spec in document
Include the QTest Protocol doc string in docs/devel/qtest.rst, after converting it to use Sphinx syntax. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201005205228.697463-3-ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -4,8 +4,8 @@ QTest Device Emulation Testing Framework
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QTest is a device emulation testing framework. It can be very useful to test
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QTest is a device emulation testing framework. It can be very useful to test
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device models; it could also control certain aspects of QEMU (such as virtual
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device models; it could also control certain aspects of QEMU (such as virtual
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clock stepping), with a special purpose "qtest" protocol. Refer to the
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clock stepping), with a special purpose "qtest" protocol. Refer to
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documentation in ``qtest.c`` for more details of the protocol.
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:ref:`qtest-protocol` for more details of the protocol.
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QTest cases can be executed with
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QTest cases can be executed with
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@ -56,3 +56,11 @@ from the output of
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which you can run manually.
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which you can run manually.
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.. _qtest-protocol:
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QTest Protocol
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--------------
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.. kernel-doc:: softmmu/qtest.c
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:doc: QTest Protocol
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@ -49,92 +49,139 @@ static void *qtest_server_send_opaque;
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#define FMT_timeval "%ld.%06ld"
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#define FMT_timeval "%ld.%06ld"
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/**
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/**
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* QTest Protocol
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* DOC: QTest Protocol
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*
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*
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* Line based protocol, request/response based. Server can send async messages
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* Line based protocol, request/response based. Server can send async messages
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* so clients should always handle many async messages before the response
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* so clients should always handle many async messages before the response
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* comes in.
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* comes in.
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*
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*
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* Valid requests
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* Valid requests
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* ^^^^^^^^^^^^^^
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*
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*
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* Clock management:
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* Clock management:
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* """""""""""""""""
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*
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*
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* The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands
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* The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands
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* let you adjust the value of the clock (monotonically). All the commands
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* let you adjust the value of the clock (monotonically). All the commands
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* return the current value of the clock in nanoseconds.
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* return the current value of the clock in nanoseconds.
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*
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*
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* .. code-block:: none
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*
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* > clock_step
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* > clock_step
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* < OK VALUE
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* < OK VALUE
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*
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*
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* Advance the clock to the next deadline. Useful when waiting for
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* Advance the clock to the next deadline. Useful when waiting for
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* asynchronous events.
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* asynchronous events.
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*
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* .. code-block:: none
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*
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*
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* > clock_step NS
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* > clock_step NS
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* < OK VALUE
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* < OK VALUE
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*
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*
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* Advance the clock by NS nanoseconds.
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* Advance the clock by NS nanoseconds.
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*
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* .. code-block:: none
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*
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*
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* > clock_set NS
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* > clock_set NS
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* < OK VALUE
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* < OK VALUE
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*
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*
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* Advance the clock to NS nanoseconds (do nothing if it's already past).
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* Advance the clock to NS nanoseconds (do nothing if it's already past).
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*
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*
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* PIO and memory access:
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* PIO and memory access:
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* """"""""""""""""""""""
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*
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* .. code-block:: none
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*
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*
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* > outb ADDR VALUE
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* > outb ADDR VALUE
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > outw ADDR VALUE
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* > outw ADDR VALUE
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > outl ADDR VALUE
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* > outl ADDR VALUE
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > inb ADDR
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* > inb ADDR
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* < OK VALUE
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* < OK VALUE
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*
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*
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* .. code-block:: none
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*
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* > inw ADDR
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* > inw ADDR
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* < OK VALUE
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* < OK VALUE
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*
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*
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* .. code-block:: none
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*
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* > inl ADDR
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* > inl ADDR
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* < OK VALUE
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* < OK VALUE
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*
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*
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* .. code-block:: none
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*
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* > writeb ADDR VALUE
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* > writeb ADDR VALUE
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > writew ADDR VALUE
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* > writew ADDR VALUE
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > writel ADDR VALUE
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* > writel ADDR VALUE
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > writeq ADDR VALUE
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* > writeq ADDR VALUE
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > readb ADDR
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* > readb ADDR
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* < OK VALUE
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* < OK VALUE
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*
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*
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* .. code-block:: none
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*
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* > readw ADDR
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* > readw ADDR
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* < OK VALUE
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* < OK VALUE
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*
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*
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* .. code-block:: none
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*
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* > readl ADDR
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* > readl ADDR
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* < OK VALUE
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* < OK VALUE
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*
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*
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* .. code-block:: none
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*
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* > readq ADDR
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* > readq ADDR
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* < OK VALUE
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* < OK VALUE
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*
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*
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* .. code-block:: none
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*
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* > read ADDR SIZE
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* > read ADDR SIZE
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* < OK DATA
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* < OK DATA
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*
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*
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* .. code-block:: none
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*
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* > write ADDR SIZE DATA
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* > write ADDR SIZE DATA
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > b64read ADDR SIZE
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* > b64read ADDR SIZE
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* < OK B64_DATA
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* < OK B64_DATA
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*
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*
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* .. code-block:: none
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*
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* > b64write ADDR SIZE B64_DATA
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* > b64write ADDR SIZE B64_DATA
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > memset ADDR SIZE VALUE
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* > memset ADDR SIZE VALUE
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* < OK
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* < OK
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*
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*
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@ -149,16 +196,21 @@ static void *qtest_server_send_opaque;
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* If the sizes do not match, the data will be truncated.
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* If the sizes do not match, the data will be truncated.
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*
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*
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* IRQ management:
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* IRQ management:
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* """""""""""""""
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*
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* .. code-block:: none
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*
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*
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* > irq_intercept_in QOM-PATH
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* > irq_intercept_in QOM-PATH
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* < OK
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* < OK
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*
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*
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* .. code-block:: none
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*
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* > irq_intercept_out QOM-PATH
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* > irq_intercept_out QOM-PATH
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* < OK
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* < OK
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*
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*
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* Attach to the gpio-in (resp. gpio-out) pins exported by the device at
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* Attach to the gpio-in (resp. gpio-out) pins exported by the device at
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* QOM-PATH. When the pin is triggered, one of the following async messages
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* QOM-PATH. When the pin is triggered, one of the following async messages
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* will be printed to the qtest stream:
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* will be printed to the qtest stream::
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*
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*
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* IRQ raise NUM
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* IRQ raise NUM
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* IRQ lower NUM
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* IRQ lower NUM
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* NUM=0 even though it is remapped to GSI 2).
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* NUM=0 even though it is remapped to GSI 2).
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*
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*
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* Setting interrupt level:
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* Setting interrupt level:
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* """"""""""""""""""""""""
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*
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* .. code-block:: none
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*
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*
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* > set_irq_in QOM-PATH NAME NUM LEVEL
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* > set_irq_in QOM-PATH NAME NUM LEVEL
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* < OK
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* < OK
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*
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*
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* where NAME is the name of the irq/gpio list, NUM is an IRQ number and
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* where NAME is the name of the irq/gpio list, NUM is an IRQ number and
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* LEVEL is an signed integer IRQ level.
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* LEVEL is an signed integer IRQ level.
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*
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*
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* Forcibly set the given interrupt pin to the given level.
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* Forcibly set the given interrupt pin to the given level.
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*
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*
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