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https://github.com/Motorhead1991/qemu.git
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target-arm queue:
* hw/arm/iotkit.c: fix minor memory leak * softfloat: fix wrong-exception-flags bug for multiply-add corner case * arm: isolate and clean up DTB generation * implement Arm v8.1-Atomics extension * Fix some bugs and missing instructions in the v8.2-FP16 extension -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJa9IUCAAoJEDwlJe0UNgzeEGMQAKKjVRzZ7MBgvxQj0FJSWhSP BZkATf3ktid255PRpIssBZiY9oM+uY6n+/IRozAGvfDBp9eQOkrZczZjfW5hpe0B YsQadtk5cUOXqQzRTegSMPOoMmz8f5GaGOk4R6AEXJEX+Rug/zbOn9Q8Yx7JTd7o yBvU1+fys3galSiB88cffA95B9fwGfLsM7rP6OC4yNdUBYwjHf3wtY53WsxtWqX9 oX4keEiROQkrOfbSy9wYPZzu/0iRo8v35+7wIZhvNSlf02k6yJ7a+w0C4EQIRhWm 5zciE+aMYr7nOGpj7AEJLrRekhwnD6Ppje6aUd15yrxfNRZkpk/FeECWnaOPDis7 QNijx5Zqg6+GyItQKi5U4vFVReMj09OB7xDyAq77xDeBj4l3lg2DNkRfRhqQZAcv 2r4EW+pfLNj76Ah1qtQ410fprw462Sopb6bHmeuFbf1QFbQvJ4CL1+7Jl3ExrDX4 2+iQb4sQghWDxhDLfRSLxQ7K+bX+mNfGdFW8h+jPShD/+JY42dTKkFZEl4ghNgMD mpj8FrQuIkSMqnDmPfoTG5MVTMERacqPU7GGM7/fxudIkByO3zTiLxJ/E+Iy8HvX 29xKoOBjKT5FJrwJABsN6VpA3EuyAARgQIZ/dd6N5GZdgn2KAIHuaI+RHFOesKFd dJGM6sdksnsAAz28aUEJ =uXY+ -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180510' into staging target-arm queue: * hw/arm/iotkit.c: fix minor memory leak * softfloat: fix wrong-exception-flags bug for multiply-add corner case * arm: isolate and clean up DTB generation * implement Arm v8.1-Atomics extension * Fix some bugs and missing instructions in the v8.2-FP16 extension # gpg: Signature made Thu 10 May 2018 18:44:34 BST # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180510: (21 commits) target/arm: Clear SVE high bits for FMOV target/arm: Fix float16 to/from int16 target/arm: Implement vector shifted FCVT for fp16 target/arm: Implement vector shifted SCVF/UCVF for fp16 target/arm: Enable ARM_FEATURE_V8_ATOMICS for user-only target/arm: Implement CAS and CASP target/arm: Fill in disas_ldst_atomic target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decode target/riscv: Use new atomic min/max expanders tcg: Use GEN_ATOMIC_HELPER_FN for opposite endian atomic add tcg: Introduce atomic helpers for integer min/max target/xtensa: Use new min/max expanders target/arm: Use new min/max expanders tcg: Introduce helpers for integer min/max atomic.h: Work around gcc spurious "unused value" warning make sure that we aren't overwriting mc->get_hotplug_handler by accident arm/boot: split load_dtb() from arm_load_kernel() platform-bus-device: use device plug callback instead of machine_done notifier pc: simplify MachineClass::get_hotplug_handler handling softfloat: Handle default NaN mode after pickNaNMulAdd, not before ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # target/riscv/translate.c
This commit is contained in:
commit
f5583c527f
33 changed files with 934 additions and 504 deletions
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@ -25,18 +25,22 @@
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#elif DATA_SIZE == 8
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# define SUFFIX q
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# define DATA_TYPE uint64_t
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# define SDATA_TYPE int64_t
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# define BSWAP bswap64
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#elif DATA_SIZE == 4
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# define SUFFIX l
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# define DATA_TYPE uint32_t
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# define SDATA_TYPE int32_t
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# define BSWAP bswap32
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#elif DATA_SIZE == 2
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# define SUFFIX w
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# define DATA_TYPE uint16_t
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# define SDATA_TYPE int16_t
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# define BSWAP bswap16
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#elif DATA_SIZE == 1
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# define SUFFIX b
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# define DATA_TYPE uint8_t
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# define SDATA_TYPE int8_t
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# define BSWAP
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#else
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# error unsupported data size
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@ -118,6 +122,39 @@ GEN_ATOMIC_HELPER(or_fetch)
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GEN_ATOMIC_HELPER(xor_fetch)
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#undef GEN_ATOMIC_HELPER
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/* These helpers are, as a whole, full barriers. Within the helper,
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* the leading barrier is explicit and the trailing barrier is within
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* cmpxchg primitive.
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*/
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#define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \
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ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
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ABI_TYPE xval EXTRA_ARGS) \
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{ \
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ATOMIC_MMU_DECLS; \
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XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \
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XDATA_TYPE cmp, old, new, val = xval; \
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smp_mb(); \
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cmp = atomic_read__nocheck(haddr); \
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do { \
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old = cmp; new = FN(old, val); \
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cmp = atomic_cmpxchg__nocheck(haddr, old, new); \
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} while (cmp != old); \
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ATOMIC_MMU_CLEANUP; \
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return RET; \
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}
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GEN_ATOMIC_HELPER_FN(fetch_smin, MIN, SDATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(fetch_umin, MIN, DATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(fetch_smax, MAX, SDATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(fetch_umax, MAX, DATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(smin_fetch, MIN, SDATA_TYPE, new)
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GEN_ATOMIC_HELPER_FN(umin_fetch, MIN, DATA_TYPE, new)
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GEN_ATOMIC_HELPER_FN(smax_fetch, MAX, SDATA_TYPE, new)
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GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new)
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#undef GEN_ATOMIC_HELPER_FN
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#endif /* DATA SIZE >= 16 */
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#undef END
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@ -192,47 +229,45 @@ GEN_ATOMIC_HELPER(xor_fetch)
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#undef GEN_ATOMIC_HELPER
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/* These helpers are, as a whole, full barriers. Within the helper,
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* the leading barrier is explicit and the trailing barrier is within
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* cmpxchg primitive.
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*/
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#define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \
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ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
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ABI_TYPE xval EXTRA_ARGS) \
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{ \
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ATOMIC_MMU_DECLS; \
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XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \
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XDATA_TYPE ldo, ldn, old, new, val = xval; \
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smp_mb(); \
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ldn = atomic_read__nocheck(haddr); \
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do { \
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ldo = ldn; old = BSWAP(ldo); new = FN(old, val); \
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ldn = atomic_cmpxchg__nocheck(haddr, ldo, BSWAP(new)); \
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} while (ldo != ldn); \
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ATOMIC_MMU_CLEANUP; \
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return RET; \
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}
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GEN_ATOMIC_HELPER_FN(fetch_smin, MIN, SDATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(fetch_umin, MIN, DATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(fetch_smax, MAX, SDATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(fetch_umax, MAX, DATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(smin_fetch, MIN, SDATA_TYPE, new)
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GEN_ATOMIC_HELPER_FN(umin_fetch, MIN, DATA_TYPE, new)
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GEN_ATOMIC_HELPER_FN(smax_fetch, MAX, SDATA_TYPE, new)
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GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new)
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/* Note that for addition, we need to use a separate cmpxchg loop instead
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of bswaps for the reverse-host-endian helpers. */
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ABI_TYPE ATOMIC_NAME(fetch_add)(CPUArchState *env, target_ulong addr,
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ABI_TYPE val EXTRA_ARGS)
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{
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ATOMIC_MMU_DECLS;
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DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
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DATA_TYPE ldo, ldn, ret, sto;
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#define ADD(X, Y) (X + Y)
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GEN_ATOMIC_HELPER_FN(fetch_add, ADD, DATA_TYPE, old)
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GEN_ATOMIC_HELPER_FN(add_fetch, ADD, DATA_TYPE, new)
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#undef ADD
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ldo = atomic_read__nocheck(haddr);
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while (1) {
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ret = BSWAP(ldo);
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sto = BSWAP(ret + val);
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ldn = atomic_cmpxchg__nocheck(haddr, ldo, sto);
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if (ldn == ldo) {
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ATOMIC_MMU_CLEANUP;
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return ret;
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}
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ldo = ldn;
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}
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}
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ABI_TYPE ATOMIC_NAME(add_fetch)(CPUArchState *env, target_ulong addr,
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ABI_TYPE val EXTRA_ARGS)
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{
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ATOMIC_MMU_DECLS;
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DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP;
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DATA_TYPE ldo, ldn, ret, sto;
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ldo = atomic_read__nocheck(haddr);
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while (1) {
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ret = BSWAP(ldo) + val;
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sto = BSWAP(ret);
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ldn = atomic_cmpxchg__nocheck(haddr, ldo, sto);
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if (ldn == ldo) {
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ATOMIC_MMU_CLEANUP;
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return ret;
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}
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ldo = ldn;
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}
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}
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#undef GEN_ATOMIC_HELPER_FN
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#endif /* DATA_SIZE >= 16 */
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#undef END
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#undef BSWAP
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#undef ABI_TYPE
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#undef DATA_TYPE
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#undef SDATA_TYPE
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#undef SUFFIX
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#undef DATA_SIZE
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@ -125,11 +125,19 @@ GEN_ATOMIC_HELPERS(fetch_add)
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GEN_ATOMIC_HELPERS(fetch_and)
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GEN_ATOMIC_HELPERS(fetch_or)
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GEN_ATOMIC_HELPERS(fetch_xor)
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GEN_ATOMIC_HELPERS(fetch_smin)
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GEN_ATOMIC_HELPERS(fetch_umin)
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GEN_ATOMIC_HELPERS(fetch_smax)
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GEN_ATOMIC_HELPERS(fetch_umax)
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GEN_ATOMIC_HELPERS(add_fetch)
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GEN_ATOMIC_HELPERS(and_fetch)
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GEN_ATOMIC_HELPERS(or_fetch)
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GEN_ATOMIC_HELPERS(xor_fetch)
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GEN_ATOMIC_HELPERS(smin_fetch)
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GEN_ATOMIC_HELPERS(umin_fetch)
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GEN_ATOMIC_HELPERS(smax_fetch)
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GEN_ATOMIC_HELPERS(umax_fetch)
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GEN_ATOMIC_HELPERS(xchg)
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