ide: pass down DriveInfo instead of BlockDriverState

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Gerd Hoffmann 2009-08-28 15:47:03 +02:00 committed by Anthony Liguori
parent ddd9bbd93b
commit f455e98cf4
19 changed files with 46 additions and 59 deletions

View file

@ -2506,7 +2506,7 @@ void ide_reset(IDEState *s)
s->media_changed = 0;
}
void ide_init2(IDEBus *bus, BlockDriverState *hd0, BlockDriverState *hd1,
void ide_init2(IDEBus *bus, DriveInfo *hd0, DriveInfo *hd1,
qemu_irq irq)
{
IDEState *s;
@ -2518,7 +2518,10 @@ void ide_init2(IDEBus *bus, BlockDriverState *hd0, BlockDriverState *hd1,
s = bus->ifs + i;
s->bus = bus;
s->unit = i;
s->bs = (i == 0) ? hd0 : hd1;
if (i == 0 && hd0)
s->bs = hd0->bdrv;
if (i == 1 && hd1)
s->bs = hd1->bdrv;
s->io_buffer = qemu_blockalign(s->bs, IDE_DMA_BUF_SECTORS*512 + 4);
if (s->bs) {
bdrv_get_geometry(s->bs, &nb_sectors);

View file

@ -528,7 +528,7 @@ uint32_t ide_data_readw(void *opaque, uint32_t addr);
void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
uint32_t ide_data_readl(void *opaque, uint32_t addr);
void ide_init2(IDEBus *bus, BlockDriverState *hd0, BlockDriverState *hd1,
void ide_init2(IDEBus *bus, DriveInfo *hd0, DriveInfo *hd1,
qemu_irq irq);
void ide_init_ioport(IDEBus *bus, int iobase, int iobase2);

View file

@ -58,7 +58,7 @@ static int isa_ide_load(QEMUFile* f, void *opaque, int version_id)
}
void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
BlockDriverState *hd0, BlockDriverState *hd1)
DriveInfo *hd0, DriveInfo *hd1)
{
ISAIDEState *s;

View file

@ -334,7 +334,7 @@ static void pmac_ide_reset(void *opaque)
/* hd_table must contain 4 block drivers */
/* PowerMac uses memory mapped registers, not I/O. Return the memory
I/O index to access the ide. */
int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq,
int pmac_ide_init (DriveInfo **hd_table, qemu_irq irq,
void *dbdma, int channel, qemu_irq dma_irq)
{
MACIOIDEState *d;

View file

@ -555,7 +555,7 @@ static int dscm1xxxx_detach(void *opaque)
return 0;
}
PCMCIACardState *dscm1xxxx_init(BlockDriverState *bdrv)
PCMCIACardState *dscm1xxxx_init(DriveInfo *bdrv)
{
MicroDriveState *md = (MicroDriveState *) qemu_mallocz(sizeof(MicroDriveState));
md->card.state = md;

View file

@ -124,7 +124,7 @@ static int mmio_ide_load(QEMUFile* f, void *opaque, int version_id)
void mmio_ide_init (target_phys_addr_t membase, target_phys_addr_t membase2,
qemu_irq irq, int shift,
BlockDriverState *hd0, BlockDriverState *hd1)
DriveInfo *hd0, DriveInfo *hd1)
{
MMIOState *s = qemu_mallocz(sizeof(MMIOState));
IDEBus *bus = qemu_mallocz(sizeof(*bus));

View file

@ -375,7 +375,7 @@ static void cmd646_reset(void *opaque)
}
/* CMD646 PCI IDE controller */
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table,
int secondary_ide_enabled)
{
PCIIDEState *d;
@ -443,12 +443,11 @@ static void piix3_reset(void *opaque)
/* hd_table must contain 4 block drivers */
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn,
qemu_irq *pic)
{
PCIIDEState *d;
uint8_t *pci_conf;
int i;
/* register a function 1 of PIIX3 */
d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
@ -475,16 +474,12 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
ide_init_ioport(&d->bus[0], 0x1f0, 0x3f6);
ide_init_ioport(&d->bus[1], 0x170, 0x376);
for (i = 0; i < 4; i++)
if (hd_table[i])
hd_table[i]->private = &d->dev;
register_savevm("ide", 0, 3, pci_ide_save, pci_ide_load, d);
}
/* hd_table must contain 4 block drivers */
/* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */
void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn,
qemu_irq *pic)
{
PCIIDEState *d;