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Save state for all CP0 instructions, they may throw a CPU exception.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-04-06 18:46:01 +00:00
parent 42a10898a8
commit f41c52f170
3 changed files with 45 additions and 16 deletions
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38
target-mips/op_helper.c
View file

@ -329,10 +329,12 @@ void do_mfc0_count (void)
void do_mtc0_status_debug(uint32_t old, uint32_t val)
{
const uint32_t mask = 0x0000FF00;
fprintf(logfile, "Status %08x => %08x Cause %08x (%08x %08x %08x)\n",
old, val, env->CP0_Cause, old & mask, val & mask,
env->CP0_Cause & mask);
fprintf(logfile, "Status %08x (%08x) => %08x (%08x) Cause %08x",
old, old & env->CP0_Cause & CP0Ca_IP_mask,
val, val & env->CP0_Cause & CP0Ca_IP_mask,
env->CP0_Cause);
(env->hflags & MIPS_HFLAG_UM) ? fputs(", UM\n", logfile)
: fputs("\n", logfile);
}
void do_mtc0_status_irqraise_debug(void)
@ -508,15 +510,29 @@ void dump_sc (void)
}
}
void debug_eret (void)
void debug_pre_eret (void)
{
if (loglevel) {
fprintf(logfile, "ERET: pc " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
env->PC, env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
fprintf(logfile, "ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
env->PC, env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC);
fputs("\n", logfile);
}
void debug_post_eret (void)
{
fprintf(logfile, " => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
env->PC, env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC);
if (env->hflags & MIPS_HFLAG_UM)
fputs(", UM\n", logfile);
else
fputs("\n", logfile);
}
}
void do_pmon (int function)