hw/pci-host/astro: Implement Hard Fail and Soft Fail mode

The Astro/Elroy chip can work in either Hard-Fail or Soft-Fail mode.

Hard fail means the system bus will send an HPMC (=crash) to the
processor, soft fail means the system bus will ignore timeouts of
MMIO-reads or MMIO-writes and return -1ULL.

The HF mode is controlled by a bit in the status register and is usually
programmed by the OS. Return the corresponing values based on the current
value of that bit.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Helge Deller 2024-02-02 21:28:50 +01:00
parent b7174d9ad3
commit f410b688af
2 changed files with 17 additions and 6 deletions

View file

@ -27,6 +27,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(ElroyState, ELROY_PCI_HOST_BRIDGE)
#define IOS_DIST_BASE_ADDR 0xfffee00000ULL
#define IOS_DIST_BASE_SIZE 0x10000ULL
#define HF_ENABLE 0x40 /* enable HF mode (default is -1 mode) */
struct AstroState;
struct ElroyState {