i386/fw_cfg: move hpet_cfg definition to hpet.c

HPET device needs to access and update hpet_cfg variable, but now it is
defined in hw/i386/fw_cfg.c and Rust code can't access it.

Move hpet_cfg definition to hpet.c (and rename it to hpet_fw_cfg). This
allows Rust HPET device implements its own global hpet_fw_cfg variable,
and will further reduce the use of unsafe C code access and calls in the
Rust HPET implementation.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-2-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Zhao Liu 2025-02-10 11:00:42 +08:00 committed by Paolo Bonzini
parent 7630ca2a70
commit f32352ff9e
3 changed files with 14 additions and 10 deletions

View file

@ -26,7 +26,9 @@
#include CONFIG_DEVICES #include CONFIG_DEVICES
#include "target/i386/cpu.h" #include "target/i386/cpu.h"
struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; #if !defined(CONFIG_HPET) && !defined(CONFIG_X_HPET_RUST)
struct hpet_fw_config hpet_fw_cfg = {.count = UINT8_MAX};
#endif
const char *fw_cfg_arch_key_name(uint16_t key) const char *fw_cfg_arch_key_name(uint16_t key)
{ {
@ -149,7 +151,7 @@ FWCfgState *fw_cfg_arch_create(MachineState *ms,
#endif #endif
fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1); fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, 1);
fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg)); fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_fw_cfg, sizeof(hpet_fw_cfg));
/* allocate memory for the NUMA channel: one (64bit) word for the number /* allocate memory for the NUMA channel: one (64bit) word for the number
* of nodes, one word for each VCPU->node and one word for each node to * of nodes, one word for each VCPU->node and one word for each node to
* hold the amount of memory. * hold the amount of memory.

View file

@ -40,6 +40,8 @@
#include "qom/object.h" #include "qom/object.h"
#include "trace.h" #include "trace.h"
struct hpet_fw_config hpet_fw_cfg = {.count = UINT8_MAX};
#define HPET_MSI_SUPPORT 0 #define HPET_MSI_SUPPORT 0
OBJECT_DECLARE_SIMPLE_TYPE(HPETState, HPET) OBJECT_DECLARE_SIMPLE_TYPE(HPETState, HPET)
@ -278,7 +280,7 @@ static int hpet_post_load(void *opaque, int version_id)
/* Push number of timers into capability returned via HPET_ID */ /* Push number of timers into capability returned via HPET_ID */
s->capability &= ~HPET_ID_NUM_TIM_MASK; s->capability &= ~HPET_ID_NUM_TIM_MASK;
s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT; s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT;
hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability; hpet_fw_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability;
/* Derive HPET_MSI_SUPPORT from the capability of the first timer. */ /* Derive HPET_MSI_SUPPORT from the capability of the first timer. */
s->flags &= ~(1 << HPET_MSI_SUPPORT); s->flags &= ~(1 << HPET_MSI_SUPPORT);
@ -665,8 +667,8 @@ static void hpet_reset(DeviceState *d)
s->hpet_counter = 0ULL; s->hpet_counter = 0ULL;
s->hpet_offset = 0ULL; s->hpet_offset = 0ULL;
s->config = 0ULL; s->config = 0ULL;
hpet_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability; hpet_fw_cfg.hpet[s->hpet_id].event_timer_block_id = (uint32_t)s->capability;
hpet_cfg.hpet[s->hpet_id].address = sbd->mmio[0].addr; hpet_fw_cfg.hpet[s->hpet_id].address = sbd->mmio[0].addr;
/* to document that the RTC lowers its output on reset as well */ /* to document that the RTC lowers its output on reset as well */
s->rtc_irq_level = 0; s->rtc_irq_level = 0;
@ -708,17 +710,17 @@ static void hpet_realize(DeviceState *dev, Error **errp)
if (!s->intcap) { if (!s->intcap) {
warn_report("Hpet's intcap not initialized"); warn_report("Hpet's intcap not initialized");
} }
if (hpet_cfg.count == UINT8_MAX) { if (hpet_fw_cfg.count == UINT8_MAX) {
/* first instance */ /* first instance */
hpet_cfg.count = 0; hpet_fw_cfg.count = 0;
} }
if (hpet_cfg.count == 8) { if (hpet_fw_cfg.count == 8) {
error_setg(errp, "Only 8 instances of HPET is allowed"); error_setg(errp, "Only 8 instances of HPET is allowed");
return; return;
} }
s->hpet_id = hpet_cfg.count++; s->hpet_id = hpet_fw_cfg.count++;
for (i = 0; i < HPET_NUM_IRQ_ROUTES; i++) { for (i = 0; i < HPET_NUM_IRQ_ROUTES; i++) {
sysbus_init_irq(sbd, &s->irqs[i]); sysbus_init_irq(sbd, &s->irqs[i]);

View file

@ -73,7 +73,7 @@ struct hpet_fw_config
struct hpet_fw_entry hpet[8]; struct hpet_fw_entry hpet[8];
} QEMU_PACKED; } QEMU_PACKED;
extern struct hpet_fw_config hpet_cfg; extern struct hpet_fw_config hpet_fw_cfg;
#define TYPE_HPET "hpet" #define TYPE_HPET "hpet"