mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-09 10:34:58 -06:00
target-arm queue:
* Support M profile derived exceptions on exception entry and exit * Implement AArch64 v8.2 crypto insns (SHA-512, SHA-3, SM3, SM4) * Implement working i.MX6 SD controller * Various devices preparatory to i.MX7 support * Preparatory patches for SVE emulation * v8M: Fix bug in implementation of 'TT' insn * Give useful error if user tries to use userspace GICv3 with KVM -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJafX+DAAoJEDwlJe0UNgzegGgP/2OepsVnpg++NkBpJdCq0wjC DFaGLpDqaXabv0E5b56flkqBsK6mO2vXoIiWOLF3f25G5pBf5zu7XOEYXWuOIBEP Yr/vl4/yWRZfiNKl6aPC5HwHKN8SWMV+Mp/GtKz0PtHLY+oGl3fBRBu8fbeoOyj9 3x+HB0c5fpAtWrRoS+XrUJfQPdkkZ4c5lDvpxec57cqOzJ8qYZEcFCi7WP3Rglox sQJEls5IXkOVGx35o7k0rIw0qzcV8iCGBsuA+4QAonxE5B0ip6aolPAaq+gf/mLP StX2UJG9JO5tOhaNBexHE/QwLNu2pver8mghIyluirLvisB6kx+dEoa0Zj/7J7or LD9O6pqpSPCCKLSw0xPOl2FqjXzbIYcjgddxrOGvUQgAhdagB2EeRHiCdZ7hQXvm Pg4gAsIAZURPrbj7LaXgDCzM0IP6bZjNR2U+C0ekJDBRJb/NTLcvlmx3MQo3s4ot s/t6FP728tnmMk7ib8w95oo2oSMiPUZBfj2IMYogXgY+pup0OunKwOQL93Lmj4By LJwawcsa/9ctyzF/XvBUHO/n4l0zZi3wLmtVojbxkxtHiFmvv5gQMlyHYM08aTJ1 Vu/V0tiX6+oXoNrJg5e8TAchsS5PmO54Sj/ywMm5Q8FWfBE19KTRl5BatxbMYahU gQQt64esxQQFxxjdSrZY =bokK -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180209' into staging target-arm queue: * Support M profile derived exceptions on exception entry and exit * Implement AArch64 v8.2 crypto insns (SHA-512, SHA-3, SM3, SM4) * Implement working i.MX6 SD controller * Various devices preparatory to i.MX7 support * Preparatory patches for SVE emulation * v8M: Fix bug in implementation of 'TT' insn * Give useful error if user tries to use userspace GICv3 with KVM # gpg: Signature made Fri 09 Feb 2018 11:01:23 GMT # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180209: (30 commits) hw/core/generic-loader: Allow PC to be set on command line target/arm/translate.c: Fix missing 'break' for TT insns target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM target/arm: Add SVE state to TB->FLAGS target/arm: Add ZCR_ELx target/arm: Add SVE to migration state target/arm: Add predicate registers for SVE target/arm: Expand vector registers for SVE hw/arm: Move virt's PSCI DT fixup code to arm/boot.c usb: Add basic code to emulate Chipidea USB IP i.MX: Add implementation of i.MX7 GPR IP block i.MX: Add i.MX7 GPT variant i.MX: Add code to emulate GPCv2 IP block i.MX: Add code to emulate i.MX7 SNVS IP-block i.MX: Add code to emulate i.MX2 watchdog IP block i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks hw: i.MX: Convert i.MX6 to use TYPE_IMX_USDHC sdhci: Add i.MX specific subtype of SDHCI target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support target/arm: implement SM4 instructions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
f31cd9e4e2
38 changed files with 2928 additions and 187 deletions
22
include/hw/intc/imx_gpcv2.h
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22
include/hw/intc/imx_gpcv2.h
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@ -0,0 +1,22 @@
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#ifndef IMX_GPCV2_H
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#define IMX_GPCV2_H
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#include "hw/sysbus.h"
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enum IMXGPCv2Registers {
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GPC_NUM = 0xE00 / sizeof(uint32_t),
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};
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typedef struct IMXGPCv2State {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t regs[GPC_NUM];
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} IMXGPCv2State;
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#define TYPE_IMX_GPCV2 "imx-gpcv2"
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#define IMX_GPCV2(obj) OBJECT_CHECK(IMXGPCv2State, (obj), TYPE_IMX_GPCV2)
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#endif /* IMX_GPCV2_H */
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33
include/hw/misc/imx2_wdt.h
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include/hw/misc/imx2_wdt.h
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@ -0,0 +1,33 @@
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/*
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* Copyright (c) 2017, Impinj, Inc.
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*
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* i.MX2 Watchdog IP block
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*
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* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef IMX2_WDT_H
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#define IMX2_WDT_H
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#include "hw/sysbus.h"
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#define TYPE_IMX2_WDT "imx2.wdt"
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#define IMX2_WDT(obj) OBJECT_CHECK(IMX2WdtState, (obj), TYPE_IMX2_WDT)
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enum IMX2WdtRegisters {
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IMX2_WDT_WCR = 0x0000,
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IMX2_WDT_REG_NUM = 0x0008 / sizeof(uint16_t) + 1,
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};
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typedef struct IMX2WdtState {
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/* <private> */
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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} IMX2WdtState;
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#endif /* IMX7_SNVS_H */
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139
include/hw/misc/imx7_ccm.h
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139
include/hw/misc/imx7_ccm.h
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@ -0,0 +1,139 @@
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/*
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* Copyright (c) 2017, Impinj, Inc.
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*
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* i.MX7 CCM, PMU and ANALOG IP blocks emulation code
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*
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* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef IMX7_CCM_H
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#define IMX7_CCM_H
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#include "hw/misc/imx_ccm.h"
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#include "qemu/bitops.h"
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enum IMX7AnalogRegisters {
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ANALOG_PLL_ARM,
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ANALOG_PLL_ARM_SET,
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ANALOG_PLL_ARM_CLR,
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ANALOG_PLL_ARM_TOG,
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ANALOG_PLL_DDR,
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ANALOG_PLL_DDR_SET,
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ANALOG_PLL_DDR_CLR,
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ANALOG_PLL_DDR_TOG,
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ANALOG_PLL_DDR_SS,
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ANALOG_PLL_DDR_SS_SET,
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ANALOG_PLL_DDR_SS_CLR,
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ANALOG_PLL_DDR_SS_TOG,
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ANALOG_PLL_DDR_NUM,
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ANALOG_PLL_DDR_NUM_SET,
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ANALOG_PLL_DDR_NUM_CLR,
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ANALOG_PLL_DDR_NUM_TOG,
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ANALOG_PLL_DDR_DENOM,
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ANALOG_PLL_DDR_DENOM_SET,
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ANALOG_PLL_DDR_DENOM_CLR,
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ANALOG_PLL_DDR_DENOM_TOG,
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ANALOG_PLL_480,
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ANALOG_PLL_480_SET,
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ANALOG_PLL_480_CLR,
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ANALOG_PLL_480_TOG,
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ANALOG_PLL_480A,
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ANALOG_PLL_480A_SET,
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ANALOG_PLL_480A_CLR,
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ANALOG_PLL_480A_TOG,
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ANALOG_PLL_480B,
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ANALOG_PLL_480B_SET,
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ANALOG_PLL_480B_CLR,
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ANALOG_PLL_480B_TOG,
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ANALOG_PLL_ENET,
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ANALOG_PLL_ENET_SET,
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ANALOG_PLL_ENET_CLR,
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ANALOG_PLL_ENET_TOG,
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ANALOG_PLL_AUDIO,
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ANALOG_PLL_AUDIO_SET,
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ANALOG_PLL_AUDIO_CLR,
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ANALOG_PLL_AUDIO_TOG,
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ANALOG_PLL_AUDIO_SS,
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ANALOG_PLL_AUDIO_SS_SET,
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ANALOG_PLL_AUDIO_SS_CLR,
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ANALOG_PLL_AUDIO_SS_TOG,
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ANALOG_PLL_AUDIO_NUM,
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ANALOG_PLL_AUDIO_NUM_SET,
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ANALOG_PLL_AUDIO_NUM_CLR,
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ANALOG_PLL_AUDIO_NUM_TOG,
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ANALOG_PLL_AUDIO_DENOM,
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ANALOG_PLL_AUDIO_DENOM_SET,
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ANALOG_PLL_AUDIO_DENOM_CLR,
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ANALOG_PLL_AUDIO_DENOM_TOG,
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ANALOG_PLL_VIDEO,
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ANALOG_PLL_VIDEO_SET,
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ANALOG_PLL_VIDEO_CLR,
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ANALOG_PLL_VIDEO_TOG,
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ANALOG_PLL_VIDEO_SS,
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ANALOG_PLL_VIDEO_SS_SET,
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ANALOG_PLL_VIDEO_SS_CLR,
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ANALOG_PLL_VIDEO_SS_TOG,
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ANALOG_PLL_VIDEO_NUM,
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ANALOG_PLL_VIDEO_NUM_SET,
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ANALOG_PLL_VIDEO_NUM_CLR,
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ANALOG_PLL_VIDEO_NUM_TOG,
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ANALOG_PLL_VIDEO_DENOM,
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ANALOG_PLL_VIDEO_DENOM_SET,
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ANALOG_PLL_VIDEO_DENOM_CLR,
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ANALOG_PLL_VIDEO_DENOM_TOG,
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ANALOG_PLL_MISC0,
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ANALOG_PLL_MISC0_SET,
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ANALOG_PLL_MISC0_CLR,
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ANALOG_PLL_MISC0_TOG,
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ANALOG_DIGPROG = 0x800 / sizeof(uint32_t),
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ANALOG_MAX,
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ANALOG_PLL_LOCK = BIT(31)
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};
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enum IMX7CCMRegisters {
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CCM_MAX = 0xBE00 / sizeof(uint32_t) + 1,
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};
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enum IMX7PMURegisters {
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PMU_MAX = 0x140 / sizeof(uint32_t),
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};
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#define TYPE_IMX7_CCM "imx7.ccm"
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#define IMX7_CCM(obj) OBJECT_CHECK(IMX7CCMState, (obj), TYPE_IMX7_CCM)
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typedef struct IMX7CCMState {
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/* <private> */
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IMXCCMState parent_obj;
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/* <public> */
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MemoryRegion iomem;
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uint32_t ccm[CCM_MAX];
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} IMX7CCMState;
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#define TYPE_IMX7_ANALOG "imx7.analog"
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#define IMX7_ANALOG(obj) OBJECT_CHECK(IMX7AnalogState, (obj), TYPE_IMX7_ANALOG)
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typedef struct IMX7AnalogState {
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/* <private> */
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IMXCCMState parent_obj;
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/* <public> */
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struct {
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MemoryRegion container;
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MemoryRegion analog;
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MemoryRegion digprog;
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MemoryRegion pmu;
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} mmio;
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uint32_t analog[ANALOG_MAX];
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uint32_t pmu[PMU_MAX];
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} IMX7AnalogState;
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#endif /* IMX7_CCM_H */
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28
include/hw/misc/imx7_gpr.h
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28
include/hw/misc/imx7_gpr.h
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/*
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* Copyright (c) 2017, Impinj, Inc.
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*
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* i.MX7 GPR IP block emulation code
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*
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* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef IMX7_GPR_H
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#define IMX7_GPR_H
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#include "qemu/bitops.h"
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#include "hw/sysbus.h"
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#define TYPE_IMX7_GPR "imx7.gpr"
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#define IMX7_GPR(obj) OBJECT_CHECK(IMX7GPRState, (obj), TYPE_IMX7_GPR)
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typedef struct IMX7GPRState {
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/* <private> */
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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} IMX7GPRState;
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#endif /* IMX7_GPR_H */
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35
include/hw/misc/imx7_snvs.h
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35
include/hw/misc/imx7_snvs.h
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/*
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* Copyright (c) 2017, Impinj, Inc.
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*
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* i.MX7 SNVS block emulation code
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*
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* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef IMX7_SNVS_H
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#define IMX7_SNVS_H
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#include "qemu/bitops.h"
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#include "hw/sysbus.h"
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enum IMX7SNVSRegisters {
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SNVS_LPCR = 0x38,
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SNVS_LPCR_TOP = BIT(6),
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SNVS_LPCR_DP_EN = BIT(5)
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};
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#define TYPE_IMX7_SNVS "imx7.snvs"
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#define IMX7_SNVS(obj) OBJECT_CHECK(IMX7SNVSState, (obj), TYPE_IMX7_SNVS)
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typedef struct IMX7SNVSState {
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/* <private> */
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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} IMX7SNVSState;
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#endif /* IMX7_SNVS_H */
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@ -44,6 +44,7 @@ typedef struct SDHCIState {
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AddressSpace sysbus_dma_as;
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AddressSpace *dma_as;
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MemoryRegion *dma_mr;
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const MemoryRegionOps *io_ops;
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QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
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QEMUTimer *transfer_timer;
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@ -91,8 +92,18 @@ typedef struct SDHCIState {
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/* Configurable properties */
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bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
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uint32_t quirks;
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} SDHCIState;
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/*
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* Controller does not provide transfer-complete interrupt when not
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* busy.
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*
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* NOTE: This definition is taken out of Linux kernel and so the
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* original bit number is preserved
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*/
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#define SDHCI_QUIRK_NO_BUSY_IRQ BIT(14)
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#define TYPE_PCI_SDHCI "sdhci-pci"
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#define PCI_SDHCI(obj) OBJECT_CHECK(SDHCIState, (obj), TYPE_PCI_SDHCI)
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@ -100,4 +111,6 @@ typedef struct SDHCIState {
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#define SYSBUS_SDHCI(obj) \
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OBJECT_CHECK(SDHCIState, (obj), TYPE_SYSBUS_SDHCI)
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#define TYPE_IMX_USDHC "imx-usdhc"
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#endif /* SDHCI_H */
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@ -77,6 +77,7 @@
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#define TYPE_IMX25_GPT "imx25.gpt"
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#define TYPE_IMX31_GPT "imx31.gpt"
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#define TYPE_IMX6_GPT "imx6.gpt"
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#define TYPE_IMX7_GPT "imx7.gpt"
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#define TYPE_IMX_GPT TYPE_IMX25_GPT
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16
include/hw/usb/chipidea.h
Normal file
16
include/hw/usb/chipidea.h
Normal file
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@ -0,0 +1,16 @@
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#ifndef CHIPIDEA_H
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#define CHIPIDEA_H
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#include "hw/usb/hcd-ehci.h"
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typedef struct ChipideaState {
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/*< private >*/
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EHCISysBusState parent_obj;
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MemoryRegion iomem[3];
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} ChipideaState;
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#define TYPE_CHIPIDEA "usb-chipidea"
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#define CHIPIDEA(obj) OBJECT_CHECK(ChipideaState, (obj), TYPE_CHIPIDEA)
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#endif /* CHIPIDEA_H */
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