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hw/xen: pvh-common: Add support for creating PCIe/GPEX

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Add support for optionally creating a PCIe/GPEX controller.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
This commit is contained in:
Edgar E. Iglesias 2024-08-16 16:00:45 +02:00
parent 692ec9337b
commit f22e598a72
2 changed files with 105 additions and 0 deletions
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29
include/hw/xen/xen-pvh-common.h
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@ -25,10 +25,29 @@ struct XenPVHMachineClass {
/* PVH implementation specific init. */
void (*init)(MachineState *state);
/*
* set_pci_intx_irq - Deliver INTX irqs to the guest.
*
* @opaque: pointer to XenPVHMachineState.
* @irq: IRQ after swizzling, between 0-3.
* @level: IRQ level.
*/
void (*set_pci_intx_irq)(void *opaque, int irq, int level);
/*
* set_pci_link_route: - optional implementation call to setup
* routing between INTX IRQ (0 - 3) and GSI's.
*
* @line: line the INTx line (0 => A .. 3 => B)
* @irq: GSI
*/
int (*set_pci_link_route)(uint8_t line, uint8_t irq);
/*
* Each implementation can optionally enable features that it
* supports and are known to work.
*/
bool has_pci;
bool has_tpm;
bool has_virtio_mmio;
};
@ -44,6 +63,12 @@ struct XenPVHMachineState {
MemoryRegion high;
} ram;
struct {
GPEXHost gpex;
MemoryRegion mmio_alias;
MemoryRegion mmio_high_alias;
} pci;
struct {
MemMapEntry ram_low, ram_high;
MemMapEntry tpm;
@ -52,6 +77,10 @@ struct XenPVHMachineState {
MemMapEntry virtio_mmio;
uint32_t virtio_mmio_num;
uint32_t virtio_mmio_irq_base;
/* PCI */
MemMapEntry pci_ecam, pci_mmio, pci_mmio_high;
uint32_t pci_intx_irq_base;
} cfg;
};