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target/riscv: remove cpu->cfg.ext_s

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Create a new "s" RISCVCPUMisaExtConfig property that will update
env->misa_ext* with RVS. Instances of cpu->cfg.ext_s and similar are
replaced with riscv_has_ext(env, RVS).

Remove the old "s" property and 'ext_s' from RISCVCPUConfig.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230406180351.570807-13-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2023-04-06 15:03:43 -03:00 • committed by Alistair Francis
parent 1a36e23a62
commit f1ea2a52dc
2 changed files with 5 additions and 7 deletions
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1
target/riscv/cpu.h
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@ -423,7 +423,6 @@ typedef struct {
struct RISCVCPUConfig {
bool ext_g;
bool ext_s;
bool ext_u;
bool ext_h;
bool ext_j;