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tcg: Export tcg_gen_ext_{i32,i64,tl}

Browse source 
The two concrete type functions already existed, merely needing
a bit of hardening to invalid inputs.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-19 09:15:22 -07:00
parent 93c86ecd77
commit f1c29532e7
3 changed files with 14 additions and 4 deletions
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14
tcg/tcg-op-ldst.c
View file

@ -714,7 +714,7 @@ void tcg_gen_qemu_st_i128_chk(TCGv_i128 val, TCGTemp *addr, TCGArg idx,
tcg_gen_qemu_st_i128_int(val, addr, idx, memop);
}
static void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc)
void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc)
{
switch (opc & MO_SSIZE) {
case MO_SB:
@ -729,13 +729,16 @@ static void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc)
case MO_UW:
tcg_gen_ext16u_i32(ret, val);
break;
default:
case MO_UL:
case MO_SL:
tcg_gen_mov_i32(ret, val);
break;
default:
g_assert_not_reached();
}
}
static void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc)
void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc)
{
switch (opc & MO_SSIZE) {
case MO_SB:
@ -756,9 +759,12 @@ static void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc)
case MO_UL:
tcg_gen_ext32u_i64(ret, val);
break;
default:
case MO_UQ:
case MO_SQ:
tcg_gen_mov_i64(ret, val);
break;
default:
g_assert_not_reached();
}
}