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spapr: introduce SpaprMachineState::numa_assoc_array
The next step to centralize all NUMA/associativity handling in the spapr machine is to create a 'one stop place' for all things ibm,associativity. This patch introduces numa_assoc_array, a 2 dimensional array that will store all ibm,associativity arrays of all NUMA nodes. This array is initialized in a new spapr_numa_associativity_init() function, called in spapr_machine_init(). It is being initialized with the same values used in other ibm,associativity properties around spapr files (i.e. all zeros, last value is node_id). The idea is to remove all hardcoded definitions and FDT writes of ibm,associativity arrays, doing instead a call to the new helper spapr_numa_write_associativity_dt() helper, that will be able to write the DT with the correct values. We'll start small, handling the trivial cases first. The remaining instances of ibm,associativity will be handled next. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20200903220639.563090-2-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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6ee1d62e6a
commit
f1aa45fffe
7 changed files with 73 additions and 33 deletions
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@ -314,14 +314,9 @@ static void add_str(GString *s, const gchar *s1)
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g_string_append_len(s, s1, strlen(s1) + 1);
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}
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static int spapr_dt_memory_node(void *fdt, int nodeid, hwaddr start,
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hwaddr size)
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static int spapr_dt_memory_node(SpaprMachineState *spapr, void *fdt, int nodeid,
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hwaddr start, hwaddr size)
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{
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uint32_t associativity[] = {
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cpu_to_be32(0x4), /* length */
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cpu_to_be32(0x0), cpu_to_be32(0x0),
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cpu_to_be32(0x0), cpu_to_be32(nodeid)
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};
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char mem_name[32];
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uint64_t mem_reg_property[2];
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int off;
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@ -335,8 +330,7 @@ static int spapr_dt_memory_node(void *fdt, int nodeid, hwaddr start,
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_FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
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_FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
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sizeof(mem_reg_property))));
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_FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
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sizeof(associativity))));
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spapr_numa_write_associativity_dt(spapr, fdt, off, nodeid);
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return off;
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}
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@ -649,7 +643,7 @@ static int spapr_dt_memory(SpaprMachineState *spapr, void *fdt)
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if (!mem_start) {
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/* spapr_machine_init() checks for rma_size <= node0_size
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* already */
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spapr_dt_memory_node(fdt, i, 0, spapr->rma_size);
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spapr_dt_memory_node(spapr, fdt, i, 0, spapr->rma_size);
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mem_start += spapr->rma_size;
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node_size -= spapr->rma_size;
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}
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@ -661,7 +655,7 @@ static int spapr_dt_memory(SpaprMachineState *spapr, void *fdt)
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sizetmp = 1ULL << ctzl(mem_start);
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}
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spapr_dt_memory_node(fdt, i, mem_start, sizetmp);
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spapr_dt_memory_node(spapr, fdt, i, mem_start, sizetmp);
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node_size -= sizetmp;
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mem_start += sizetmp;
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}
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@ -1275,7 +1269,7 @@ void *spapr_build_fdt(SpaprMachineState *spapr, bool reset, size_t space)
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/* NVDIMM devices */
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if (mc->nvdimm_supported) {
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spapr_dt_persistent_memory(fdt);
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spapr_dt_persistent_memory(spapr, fdt);
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}
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return fdt;
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@ -2810,6 +2804,9 @@ static void spapr_machine_init(MachineState *machine)
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*/
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spapr->gpu_numa_id = MAX(1, machine->numa_state->num_nodes);
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/* Init numa_assoc_array */
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spapr_numa_associativity_init(spapr, machine);
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if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) &&
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ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0,
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spapr->max_compat_pvr)) {
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@ -3394,7 +3391,7 @@ int spapr_lmb_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
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addr = spapr_drc_index(drc) * SPAPR_MEMORY_BLOCK_SIZE;
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node = object_property_get_uint(OBJECT(drc->dev), PC_DIMM_NODE_PROP,
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&error_abort);
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*fdt_start_offset = spapr_dt_memory_node(fdt, node, addr,
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*fdt_start_offset = spapr_dt_memory_node(spapr, fdt, node, addr,
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SPAPR_MEMORY_BLOCK_SIZE);
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return 0;
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}
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