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hw/cxl/events: Improve QMP interfaces and documentation for add/release dynamic capacity.

Browse source 
New DCD command definitions updated in response to review comments
from Markus.

- Used CxlXXXX instead of CXLXXXXX for newly added types.
- Expanded some abreviations in type names to be easier to read.
- Additional documentation for some fields.
- Replace slightly vague cxl r3.1 references with
  "Compute Express Link (CXL) Specification, Revision 3.1, XXXX"
  to bring them inline with what it says on the specification cover.

Suggested-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240625170805.359278-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Jonathan Cameron 2024-06-25 18:08:04 +01:00 • committed by Michael S. Tsirkin
parent 0f130d9e37
commit efc4ad6f99
3 changed files with 103 additions and 67 deletions
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18
hw/mem/cxl_type3.c
View file

@ -1874,7 +1874,7 @@ static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
*/ */
static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path, static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
uint16_t hid, CXLDCEventType type, uint8_t rid, uint16_t hid, CXLDCEventType type, uint8_t rid,
CXLDynamicCapacityExtentList *records, Error **errp) CxlDynamicCapacityExtentList *records, Error **errp)
{ {
Object *obj; Object *obj;
CXLEventDynamicCapacity dCap = {}; CXLEventDynamicCapacity dCap = {};
@ -1882,7 +1882,7 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
CXLType3Dev *dcd; CXLType3Dev *dcd;
uint8_t flags = 1 << CXL_EVENT_TYPE_INFO; uint8_t flags = 1 << CXL_EVENT_TYPE_INFO;
uint32_t num_extents = 0; uint32_t num_extents = 0;
CXLDynamicCapacityExtentList *list; CxlDynamicCapacityExtentList *list;
CXLDCExtentGroup *group = NULL; CXLDCExtentGroup *group = NULL;
g_autofree CXLDCExtentRaw *extents = NULL; g_autofree CXLDCExtentRaw *extents = NULL;
uint8_t enc_log = CXL_EVENT_TYPE_DYNAMIC_CAP; uint8_t enc_log = CXL_EVENT_TYPE_DYNAMIC_CAP;
@ -2032,13 +2032,13 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
} }
void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id, void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id,
CXLExtSelPolicy sel_policy, uint8_t region, CxlExtentSelectionPolicy sel_policy,
const char *tag, uint8_t region, const char *tag,
CXLDynamicCapacityExtentList *extents, CxlDynamicCapacityExtentList *extents,
Error **errp) Error **errp)
{ {
switch (sel_policy) { switch (sel_policy) {
case CXL_EXT_SEL_POLICY_PRESCRIPTIVE: case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE:
qmp_cxl_process_dynamic_capacity_prescriptive(path, host_id, qmp_cxl_process_dynamic_capacity_prescriptive(path, host_id,
DC_EVENT_ADD_CAPACITY, DC_EVENT_ADD_CAPACITY,
region, extents, errp); region, extents, errp);
@ -2050,14 +2050,14 @@ void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id,
} }
void qmp_cxl_release_dynamic_capacity(const char *path, uint16_t host_id, void qmp_cxl_release_dynamic_capacity(const char *path, uint16_t host_id,
CXLExtRemovalPolicy removal_policy, CxlExtentRemovalPolicy removal_policy,
bool has_forced_removal, bool has_forced_removal,
bool forced_removal, bool forced_removal,
bool has_sanitize_on_release, bool has_sanitize_on_release,
bool sanitize_on_release, bool sanitize_on_release,
uint8_t region, uint8_t region,
const char *tag, const char *tag,
CXLDynamicCapacityExtentList *extents, CxlDynamicCapacityExtentList *extents,
Error **errp) Error **errp)
{ {
CXLDCEventType type = DC_EVENT_RELEASE_CAPACITY; CXLDCEventType type = DC_EVENT_RELEASE_CAPACITY;
@ -2070,7 +2070,7 @@ void qmp_cxl_release_dynamic_capacity(const char *path, uint16_t host_id,
} }
switch (removal_policy) { switch (removal_policy) {
case CXL_EXT_REMOVAL_POLICY_PRESCRIPTIVE: case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE:
qmp_cxl_process_dynamic_capacity_prescriptive(path, host_id, type, qmp_cxl_process_dynamic_capacity_prescriptive(path, host_id, type,
region, extents, errp); region, extents, errp);
return; return;

8
hw/mem/cxl_type3_stubs.c
View file

@ -70,24 +70,24 @@ void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
void qmp_cxl_add_dynamic_capacity(const char *path, void qmp_cxl_add_dynamic_capacity(const char *path,
uint16_t host_id, uint16_t host_id,
CXLExtSelPolicy sel_policy, CxlExtentSelectionPolicy sel_policy,
uint8_t region, uint8_t region,
const char *tag, const char *tag,
CXLDynamicCapacityExtentList *extents, CxlDynamicCapacityExtentList *extents,
Error **errp) Error **errp)
{ {
error_setg(errp, "CXL Type 3 support is not compiled in"); error_setg(errp, "CXL Type 3 support is not compiled in");
} }
void qmp_cxl_release_dynamic_capacity(const char *path, uint16_t host_id, void qmp_cxl_release_dynamic_capacity(const char *path, uint16_t host_id,
CXLExtRemovalPolicy removal_policy, CxlExtentRemovalPolicy removal_policy,
bool has_forced_removal, bool has_forced_removal,
bool forced_removal, bool forced_removal,
bool has_sanitize_on_release, bool has_sanitize_on_release,
bool sanitize_on_release, bool sanitize_on_release,
uint8_t region, uint8_t region,
const char *tag, const char *tag,
CXLDynamicCapacityExtentList *extents, CxlDynamicCapacityExtentList *extents,
Error **errp) Error **errp)
{ {
error_setg(errp, "CXL Type 3 support is not compiled in"); error_setg(errp, "CXL Type 3 support is not compiled in");

144
qapi/cxl.json
View file

@ -363,9 +363,11 @@
'data': {'path': 'str', 'type': 'CxlCorErrorType'}} 'data': {'path': 'str', 'type': 'CxlCorErrorType'}}
## ##
# @CXLDynamicCapacityExtent: # @CxlDynamicCapacityExtent:
# #
# A single dynamic capacity extent # A single dynamic capacity extent. This is a contiguous allocation
# of memory by Device Physical Address within a single Dynamic
# Capacity Region on a CXL Type 3 Device.
# #
# @offset: The offset (in bytes) to the start of the region # @offset: The offset (in bytes) to the start of the region
# where the extent belongs to. # where the extent belongs to.
@ -374,7 +376,7 @@
# #
# Since: 9.1 # Since: 9.1
## ##
{ 'struct': 'CXLDynamicCapacityExtent', { 'struct': 'CxlDynamicCapacityExtent',
'data': { 'data': {
'offset':'uint64', 'offset':'uint64',
'len': 'uint64' 'len': 'uint64'
@ -382,22 +384,40 @@
} }
## ##
# @CXLExtSelPolicy: # @CxlExtentSelectionPolicy:
# #
# The policy to use for selecting which extents comprise the added # The policy to use for selecting which extents comprise the added
# capacity, as defined in cxl spec r3.1 Table 7-70. # capacity, as defined in Compute Express Link (CXL) Specification,
# Revision 3.1, Table 7-70.
# #
# @free: 0h = Free # @free: Device is responsible for allocating the requested memory
# capacity and is free to do this using any combination of
# supported extents.
# #
# @contiguous: 1h = Continuous # @contiguous: Device is responsible for allocating the requested
# memory capacity but must do so as a single contiguous
# extent.
# #
# @prescriptive: 2h = Prescriptive # @prescriptive: The precise set of extents to be allocated is
# specified by the command. Thus allocation is being managed
# by the issuer of the allocation command, not the device.
# #
# @enable-shared-access: 3h = Enable Shared Access # @enable-shared-access: Capacity has already been allocated to a
# different host using free, contiguous or prescriptive policy
# with a known tag. This policy then instructs the device to
# make the capacity with the specified tag available to an
# additional host. Capacity is implicit as it matches that
# already associated with the tag. Note that the extent list
# (and hence Device Physical Addresses) used are per host, so
# a device may use different representations on each host.
# The ordering of the extents provided to each host is indicated
# to the host using per extent sequence numbers generated by
# the device. Has a similar meaning for temporal sharing, but
# in that case there may be only one host involved.
# #
# Since: 9.1 # Since: 9.1
## ##
{ 'enum': 'CXLExtSelPolicy', { 'enum': 'CxlExtentSelectionPolicy',
'data': ['free', 'data': ['free',
'contiguous', 'contiguous',
'prescriptive', 'prescriptive',
@ -407,54 +427,60 @@
## ##
# @cxl-add-dynamic-capacity: # @cxl-add-dynamic-capacity:
# #
# Command to initiate to add dynamic capacity extents to a host. It # Initiate adding dynamic capacity extents to a host. This simulates
# simulates operations defined in cxl spec r3.1 7.6.7.6.5. # operations defined in Compute Express Link (CXL) Specification,
# Revision 3.1, Section 7.6.7.6.5. Note that, currently, establishing
# success or failure of the full Add Dynamic Capacity flow requires
# out of band communication with the OS of the CXL host.
# #
# @path: CXL DCD canonical QOM path. # @path: path to the CXL Dynamic Capacity Device in the QOM tree.
# #
# @host-id: The "Host ID" field as defined in cxl spec r3.1 # @host-id: The "Host ID" field as defined in Compute Express Link
# Table 7-70. # (CXL) Specification, Revision 3.1, Table 7-70.
# #
# @selection-policy: The "Selection Policy" bits as defined in # @selection-policy: The "Selection Policy" bits as defined in
# cxl spec r3.1 Table 7-70. It specifies the policy to use for # Compute Express Link (CXL) Specification, Revision 3.1,
# selecting which extents comprise the added capacity. # Table 7-70. It specifies the policy to use for selecting
# which extents comprise the added capacity.
# #
# @region: The "Region Number" field as defined in cxl spec r3.1 # @region: The "Region Number" field as defined in Compute Express
# Table 7-70. The dynamic capacity region where the capacity # Link (CXL) Specification, Revision 3.1, Table 7-70. Valid
# is being added. Valid range is from 0-7. # range is from 0-7.
# #
# @tag: The "Tag" field as defined in cxl spec r3.1 Table 7-70. # @tag: The "Tag" field as defined in Compute Express Link (CXL)
# Specification, Revision 3.1, Table 7-70.
# #
# @extents: The "Extent List" field as defined in cxl spec r3.1 # @extents: The "Extent List" field as defined in Compute Express Link
# Table 7-70. # (CXL) Specification, Revision 3.1, Table 7-70.
# #
# Since : 9.1 # Since : 9.1
## ##
{ 'command': 'cxl-add-dynamic-capacity', { 'command': 'cxl-add-dynamic-capacity',
'data': { 'path': 'str', 'data': { 'path': 'str',
'host-id': 'uint16', 'host-id': 'uint16',
'selection-policy': 'CXLExtSelPolicy', 'selection-policy': 'CxlExtentSelectionPolicy',
'region': 'uint8', 'region': 'uint8',
'*tag': 'str', '*tag': 'str',
'extents': [ 'CXLDynamicCapacityExtent' ] 'extents': [ 'CxlDynamicCapacityExtent' ]
} }
} }
## ##
# @CXLExtRemovalPolicy: # @CxlExtentRemovalPolicy:
# #
# The policy to use for selecting which extents comprise the released # The policy to use for selecting which extents comprise the released
# capacity, defined in the "Flags" field in cxl spec r3.1 Table 7-71. # capacity, defined in the "Flags" field in Compute Express Link (CXL)
# Specification, Revision 3.1, Table 7-71.
# #
# @tag-based: value = 0h. Extents are selected by the device based # @tag-based: Extents are selected by the device based on tag, with
# on tag, with no requirement for contiguous extents. # no requirement for contiguous extents.
# #
# @prescriptive: value = 1h. Extent list of capacity to release is # @prescriptive: Extent list of capacity to release is included in
# included in the request payload. # the request payload.
# #
# Since: 9.1 # Since: 9.1
## ##
{ 'enum': 'CXLExtRemovalPolicy', { 'enum': 'CxlExtentRemovalPolicy',
'data': ['tag-based', 'data': ['tag-based',
'prescriptive'] 'prescriptive']
} }
@ -462,45 +488,55 @@
## ##
# @cxl-release-dynamic-capacity: # @cxl-release-dynamic-capacity:
# #
# Command to initiate to release dynamic capacity extents from a # Initiate release of dynamic capacity extents from a host. This
# host. It simulates operations defined in cxl spec r3.1 7.6.7.6.6. # simulates operations defined in Compute Express Link (CXL)
# Specification, Revision 3.1, Section 7.6.7.6.6. Note that,
# currently, success or failure of the full Release Dynamic Capacity
# flow requires out of band communication with the OS of the CXL host.
# #
# @path: CXL DCD canonical QOM path. # @path: path to the CXL Dynamic Capacity Device in the QOM tree.
# #
# @host-id: The "Host ID" field as defined in cxl spec r3.1 # @host-id: The "Host ID" field as defined in Compute Express Link
# (CXL) Specification, Revision 3.1, Table 7-71.
#
# @removal-policy: Bit[3:0] of the "Flags" field as defined in
# Compute Express Link (CXL) Specification, Revision 3.1,
# Table 7-71. # Table 7-71.
# #
# @removal-policy: Bit[3:0] of the "Flags" field as defined in cxl # @forced-removal: Bit[4] of the "Flags" field in Compute Express
# spec r3.1 Table 7-71. # Link (CXL) Specification, Revision 3.1, Table 7-71. When set,
# the device does not wait for a Release Dynamic Capacity command
# from the host. Instead, the host immediately looses access to
# the released capacity.
# #
# @forced-removal: Bit[4] of the "Flags" field in cxl spec r3.1 # @sanitize-on-release: Bit[5] of the "Flags" field in Compute
# Table 7-71. When set, device does not wait for a Release # Express Link (CXL) Specification, Revision 3.1, Table 7-71.
# Dynamic Capacity command from the host. Host immediately # When set, the device should sanitize all released capacity as
# loses access to released capacity. # a result of this request. This ensures that all user data
# and metadata is made permanently unavailable by whatever
# means is appropriate for the media type. Note that changing
# encryption keys is not sufficient.
# #
# @sanitize-on-release: Bit[5] of the "Flags" field in cxl spec r3.1 # @region: The "Region Number" field as defined in Compute Express
# Table 7-71. When set, device should sanitize all released # Link Specification, Revision 3.1, Table 7-71. Valid range
# capacity as a result of this request. # is from 0-7.
# #
# @region: The "Region Number" field as defined in cxl spec r3.1 # @tag: The "Tag" field as defined in Compute Express Link (CXL)
# Table 7-71. The dynamic capacity region where the capacity # Specification, Revision 3.1, Table 7-71.
# is being added. Valid range is from 0-7.
# #
# @tag: The "Tag" field as defined in cxl spec r3.1 Table 7-71. # @extents: The "Extent List" field as defined in Compute Express
# # Link (CXL) Specification, Revision 3.1, Table 7-71.
# @extents: The "Extent List" field as defined in cxl spec r3.1
# Table 7-71.
# #
# Since : 9.1 # Since : 9.1
## ##
{ 'command': 'cxl-release-dynamic-capacity', { 'command': 'cxl-release-dynamic-capacity',
'data': { 'path': 'str', 'data': { 'path': 'str',
'host-id': 'uint16', 'host-id': 'uint16',
'removal-policy': 'CXLExtRemovalPolicy', 'removal-policy': 'CxlExtentRemovalPolicy',
'*forced-removal': 'bool', '*forced-removal': 'bool',
'*sanitize-on-release': 'bool', '*sanitize-on-release': 'bool',
'region': 'uint8', 'region': 'uint8',
'*tag': 'str', '*tag': 'str',
'extents': [ 'CXLDynamicCapacityExtent' ] 'extents': [ 'CxlDynamicCapacityExtent' ]
} }
} }