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linux-headers: Update to Linux v6.7-rc5
We'll add a new RISC-V linux-header file, but first let's update all headers. Headers for 'asm-loongarch' were added in this update. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20231218204321.75757-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
871dad3a19
commit
efb91426af
29 changed files with 498 additions and 27 deletions
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@ -47,6 +47,8 @@ enum {
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IOMMUFD_CMD_VFIO_IOAS,
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IOMMUFD_CMD_HWPT_ALLOC,
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IOMMUFD_CMD_GET_HW_INFO,
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IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING,
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IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP,
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};
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/**
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@ -347,20 +349,86 @@ struct iommu_vfio_ioas {
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};
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#define IOMMU_VFIO_IOAS _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VFIO_IOAS)
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/**
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* enum iommufd_hwpt_alloc_flags - Flags for HWPT allocation
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* @IOMMU_HWPT_ALLOC_NEST_PARENT: If set, allocate a HWPT that can serve as
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* the parent HWPT in a nesting configuration.
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* @IOMMU_HWPT_ALLOC_DIRTY_TRACKING: Dirty tracking support for device IOMMU is
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* enforced on device attachment
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*/
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enum iommufd_hwpt_alloc_flags {
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IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0,
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IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1,
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};
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/**
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* enum iommu_hwpt_vtd_s1_flags - Intel VT-d stage-1 page table
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* entry attributes
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* @IOMMU_VTD_S1_SRE: Supervisor request
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* @IOMMU_VTD_S1_EAFE: Extended access enable
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* @IOMMU_VTD_S1_WPE: Write protect enable
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*/
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enum iommu_hwpt_vtd_s1_flags {
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IOMMU_VTD_S1_SRE = 1 << 0,
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IOMMU_VTD_S1_EAFE = 1 << 1,
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IOMMU_VTD_S1_WPE = 1 << 2,
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};
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/**
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* struct iommu_hwpt_vtd_s1 - Intel VT-d stage-1 page table
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* info (IOMMU_HWPT_DATA_VTD_S1)
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* @flags: Combination of enum iommu_hwpt_vtd_s1_flags
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* @pgtbl_addr: The base address of the stage-1 page table.
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* @addr_width: The address width of the stage-1 page table
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* @__reserved: Must be 0
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*/
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struct iommu_hwpt_vtd_s1 {
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__aligned_u64 flags;
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__aligned_u64 pgtbl_addr;
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__u32 addr_width;
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__u32 __reserved;
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};
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/**
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* enum iommu_hwpt_data_type - IOMMU HWPT Data Type
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* @IOMMU_HWPT_DATA_NONE: no data
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* @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
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*/
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enum iommu_hwpt_data_type {
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IOMMU_HWPT_DATA_NONE,
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IOMMU_HWPT_DATA_VTD_S1,
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};
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/**
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* struct iommu_hwpt_alloc - ioctl(IOMMU_HWPT_ALLOC)
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* @size: sizeof(struct iommu_hwpt_alloc)
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* @flags: Must be 0
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* @flags: Combination of enum iommufd_hwpt_alloc_flags
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* @dev_id: The device to allocate this HWPT for
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* @pt_id: The IOAS to connect this HWPT to
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* @pt_id: The IOAS or HWPT to connect this HWPT to
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* @out_hwpt_id: The ID of the new HWPT
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* @__reserved: Must be 0
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* @data_type: One of enum iommu_hwpt_data_type
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* @data_len: Length of the type specific data
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* @data_uptr: User pointer to the type specific data
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*
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* Explicitly allocate a hardware page table object. This is the same object
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* type that is returned by iommufd_device_attach() and represents the
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* underlying iommu driver's iommu_domain kernel object.
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*
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* A HWPT will be created with the IOVA mappings from the given IOAS.
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* A kernel-managed HWPT will be created with the mappings from the given
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* IOAS via the @pt_id. The @data_type for this allocation must be set to
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* IOMMU_HWPT_DATA_NONE. The HWPT can be allocated as a parent HWPT for a
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* nesting configuration by passing IOMMU_HWPT_ALLOC_NEST_PARENT via @flags.
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*
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* A user-managed nested HWPT will be created from a given parent HWPT via
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* @pt_id, in which the parent HWPT must be allocated previously via the
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* same ioctl from a given IOAS (@pt_id). In this case, the @data_type
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* must be set to a pre-defined type corresponding to an I/O page table
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* type supported by the underlying IOMMU hardware.
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*
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* If the @data_type is set to IOMMU_HWPT_DATA_NONE, @data_len and
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* @data_uptr should be zero. Otherwise, both @data_len and @data_uptr
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* must be given.
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*/
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struct iommu_hwpt_alloc {
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__u32 size;
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@ -369,13 +437,26 @@ struct iommu_hwpt_alloc {
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__u32 pt_id;
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__u32 out_hwpt_id;
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__u32 __reserved;
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__u32 data_type;
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__u32 data_len;
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__aligned_u64 data_uptr;
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};
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#define IOMMU_HWPT_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_ALLOC)
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/**
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* enum iommu_hw_info_vtd_flags - Flags for VT-d hw_info
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* @IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17: If set, disallow read-only mappings
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* on a nested_parent domain.
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* https://www.intel.com/content/www/us/en/content-details/772415/content-details.html
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*/
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enum iommu_hw_info_vtd_flags {
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IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17 = 1 << 0,
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};
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/**
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* struct iommu_hw_info_vtd - Intel VT-d hardware information
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*
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* @flags: Must be 0
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* @flags: Combination of enum iommu_hw_info_vtd_flags
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* @__reserved: Must be 0
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*
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* @cap_reg: Value of Intel VT-d capability register defined in VT-d spec
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@ -404,6 +485,20 @@ enum iommu_hw_info_type {
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IOMMU_HW_INFO_TYPE_INTEL_VTD,
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};
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/**
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* enum iommufd_hw_capabilities
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* @IOMMU_HW_CAP_DIRTY_TRACKING: IOMMU hardware support for dirty tracking
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* If available, it means the following APIs
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* are supported:
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*
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* IOMMU_HWPT_GET_DIRTY_BITMAP
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* IOMMU_HWPT_SET_DIRTY_TRACKING
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*
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*/
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enum iommufd_hw_capabilities {
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IOMMU_HW_CAP_DIRTY_TRACKING = 1 << 0,
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};
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/**
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* struct iommu_hw_info - ioctl(IOMMU_GET_HW_INFO)
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* @size: sizeof(struct iommu_hw_info)
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@ -415,6 +510,8 @@ enum iommu_hw_info_type {
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* the iommu type specific hardware information data
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* @out_data_type: Output the iommu hardware info type as defined in the enum
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* iommu_hw_info_type.
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* @out_capabilities: Output the generic iommu capability info type as defined
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* in the enum iommu_hw_capabilities.
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* @__reserved: Must be 0
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*
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* Query an iommu type specific hardware information data from an iommu behind
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@ -439,6 +536,81 @@ struct iommu_hw_info {
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__aligned_u64 data_uptr;
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__u32 out_data_type;
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__u32 __reserved;
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__aligned_u64 out_capabilities;
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};
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#define IOMMU_GET_HW_INFO _IO(IOMMUFD_TYPE, IOMMUFD_CMD_GET_HW_INFO)
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/*
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* enum iommufd_hwpt_set_dirty_tracking_flags - Flags for steering dirty
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* tracking
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* @IOMMU_HWPT_DIRTY_TRACKING_ENABLE: Enable dirty tracking
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*/
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enum iommufd_hwpt_set_dirty_tracking_flags {
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IOMMU_HWPT_DIRTY_TRACKING_ENABLE = 1,
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};
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/**
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* struct iommu_hwpt_set_dirty_tracking - ioctl(IOMMU_HWPT_SET_DIRTY_TRACKING)
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* @size: sizeof(struct iommu_hwpt_set_dirty_tracking)
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* @flags: Combination of enum iommufd_hwpt_set_dirty_tracking_flags
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* @hwpt_id: HW pagetable ID that represents the IOMMU domain
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* @__reserved: Must be 0
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*
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* Toggle dirty tracking on an HW pagetable.
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*/
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struct iommu_hwpt_set_dirty_tracking {
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__u32 size;
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__u32 flags;
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__u32 hwpt_id;
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__u32 __reserved;
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};
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#define IOMMU_HWPT_SET_DIRTY_TRACKING _IO(IOMMUFD_TYPE, \
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IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING)
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/**
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* enum iommufd_hwpt_get_dirty_bitmap_flags - Flags for getting dirty bits
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* @IOMMU_HWPT_GET_DIRTY_BITMAP_NO_CLEAR: Just read the PTEs without clearing
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* any dirty bits metadata. This flag
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* can be passed in the expectation
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* where the next operation is an unmap
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* of the same IOVA range.
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*
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*/
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enum iommufd_hwpt_get_dirty_bitmap_flags {
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IOMMU_HWPT_GET_DIRTY_BITMAP_NO_CLEAR = 1,
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};
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/**
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* struct iommu_hwpt_get_dirty_bitmap - ioctl(IOMMU_HWPT_GET_DIRTY_BITMAP)
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* @size: sizeof(struct iommu_hwpt_get_dirty_bitmap)
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* @hwpt_id: HW pagetable ID that represents the IOMMU domain
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* @flags: Combination of enum iommufd_hwpt_get_dirty_bitmap_flags
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* @__reserved: Must be 0
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* @iova: base IOVA of the bitmap first bit
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* @length: IOVA range size
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* @page_size: page size granularity of each bit in the bitmap
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* @data: bitmap where to set the dirty bits. The bitmap bits each
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* represent a page_size which you deviate from an arbitrary iova.
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*
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* Checking a given IOVA is dirty:
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*
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* data[(iova / page_size) / 64] & (1ULL << ((iova / page_size) % 64))
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*
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* Walk the IOMMU pagetables for a given IOVA range to return a bitmap
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* with the dirty IOVAs. In doing so it will also by default clear any
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* dirty bit metadata set in the IOPTE.
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*/
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struct iommu_hwpt_get_dirty_bitmap {
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__u32 size;
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__u32 hwpt_id;
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__u32 flags;
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__u32 __reserved;
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__aligned_u64 iova;
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__aligned_u64 length;
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__aligned_u64 page_size;
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__aligned_u64 data;
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};
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#define IOMMU_HWPT_GET_DIRTY_BITMAP _IO(IOMMUFD_TYPE, \
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IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP)
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#endif
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@ -264,6 +264,7 @@ struct kvm_xen_exit {
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#define KVM_EXIT_RISCV_SBI 35
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#define KVM_EXIT_RISCV_CSR 36
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#define KVM_EXIT_NOTIFY 37
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#define KVM_EXIT_LOONGARCH_IOCSR 38
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/* For KVM_EXIT_INTERNAL_ERROR */
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/* Emulate instruction failed. */
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@ -336,6 +337,13 @@ struct kvm_run {
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__u32 len;
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__u8 is_write;
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} mmio;
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/* KVM_EXIT_LOONGARCH_IOCSR */
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struct {
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__u64 phys_addr;
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__u8 data[8];
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__u32 len;
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__u8 is_write;
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} iocsr_io;
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/* KVM_EXIT_HYPERCALL */
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struct {
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__u64 nr;
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@ -1188,6 +1196,7 @@ struct kvm_ppc_resize_hpt {
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#define KVM_CAP_COUNTER_OFFSET 227
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#define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228
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#define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229
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#define KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES 230
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#ifdef KVM_CAP_IRQ_ROUTING
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@ -1358,6 +1367,7 @@ struct kvm_dirty_tlb {
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#define KVM_REG_ARM64 0x6000000000000000ULL
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#define KVM_REG_MIPS 0x7000000000000000ULL
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#define KVM_REG_RISCV 0x8000000000000000ULL
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#define KVM_REG_LOONGARCH 0x9000000000000000ULL
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#define KVM_REG_SIZE_SHIFT 52
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#define KVM_REG_SIZE_MASK 0x00f0000000000000ULL
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@ -1558,6 +1568,7 @@ struct kvm_s390_ucas_mapping {
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#define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags)
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/* Available with KVM_CAP_COUNTER_OFFSET */
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#define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset)
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#define KVM_ARM_GET_REG_WRITABLE_MASKS _IOR(KVMIO, 0xb6, struct reg_mask_range)
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/* ioctl for vm fd */
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#define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device)
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@ -68,6 +68,7 @@ typedef enum {
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SEV_RET_INVALID_PARAM,
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SEV_RET_RESOURCE_LIMIT,
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SEV_RET_SECURE_DATA_INVALID,
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SEV_RET_INVALID_KEY = 0x27,
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SEV_RET_MAX,
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} sev_ret_code;
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@ -27,8 +27,13 @@
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union { \
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struct { MEMBERS } ATTRS; \
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struct TAG { MEMBERS } ATTRS NAME; \
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}
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} ATTRS
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#ifdef __cplusplus
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/* sizeof(struct{}) is 1 in C++, not 0, can't use C version of the macro. */
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#define __DECLARE_FLEX_ARRAY(T, member) \
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T member[0]
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#else
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/**
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* __DECLARE_FLEX_ARRAY() - Declare a flexible array usable in a union
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*
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@ -49,3 +54,5 @@
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#ifndef __counted_by
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#define __counted_by(m)
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#endif
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#endif /* _LINUX_STDDEF_H */
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@ -40,7 +40,8 @@
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UFFD_FEATURE_EXACT_ADDRESS | \
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UFFD_FEATURE_WP_HUGETLBFS_SHMEM | \
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UFFD_FEATURE_WP_UNPOPULATED | \
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UFFD_FEATURE_POISON)
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UFFD_FEATURE_POISON | \
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UFFD_FEATURE_WP_ASYNC)
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#define UFFD_API_IOCTLS \
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((__u64)1 << _UFFDIO_REGISTER | \
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(__u64)1 << _UFFDIO_UNREGISTER | \
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@ -216,6 +217,11 @@ struct uffdio_api {
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* (i.e. empty ptes). This will be the default behavior for shmem
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* & hugetlbfs, so this flag only affects anonymous memory behavior
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* when userfault write-protection mode is registered.
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*
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* UFFD_FEATURE_WP_ASYNC indicates that userfaultfd write-protection
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* asynchronous mode is supported in which the write fault is
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* automatically resolved and write-protection is un-set.
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* It implies UFFD_FEATURE_WP_UNPOPULATED.
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*/
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#define UFFD_FEATURE_PAGEFAULT_FLAG_WP (1<<0)
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#define UFFD_FEATURE_EVENT_FORK (1<<1)
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@ -232,6 +238,7 @@ struct uffdio_api {
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#define UFFD_FEATURE_WP_HUGETLBFS_SHMEM (1<<12)
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#define UFFD_FEATURE_WP_UNPOPULATED (1<<13)
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#define UFFD_FEATURE_POISON (1<<14)
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#define UFFD_FEATURE_WP_ASYNC (1<<15)
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__u64 features;
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__u64 ioctls;
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@ -277,8 +277,8 @@ struct vfio_region_info {
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#define VFIO_REGION_INFO_FLAG_CAPS (1 << 3) /* Info supports caps */
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__u32 index; /* Region index */
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__u32 cap_offset; /* Offset within info struct of first cap */
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__u64 size; /* Region size (bytes) */
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__u64 offset; /* Region offset from start of device fd */
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__aligned_u64 size; /* Region size (bytes) */
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__aligned_u64 offset; /* Region offset from start of device fd */
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};
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#define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8)
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@ -294,8 +294,8 @@ struct vfio_region_info {
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#define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1
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struct vfio_region_sparse_mmap_area {
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__u64 offset; /* Offset of mmap'able area within region */
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__u64 size; /* Size of mmap'able area */
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__aligned_u64 offset; /* Offset of mmap'able area within region */
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__aligned_u64 size; /* Size of mmap'able area */
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};
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struct vfio_region_info_cap_sparse_mmap {
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@ -450,9 +450,9 @@ struct vfio_device_migration_info {
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VFIO_DEVICE_STATE_V1_RESUMING)
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__u32 reserved;
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__u64 pending_bytes;
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__u64 data_offset;
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__u64 data_size;
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__aligned_u64 pending_bytes;
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__aligned_u64 data_offset;
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__aligned_u64 data_size;
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};
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/*
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@ -476,7 +476,7 @@ struct vfio_device_migration_info {
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||||
struct vfio_region_info_cap_nvlink2_ssatgt {
|
||||
struct vfio_info_cap_header header;
|
||||
__u64 tgt;
|
||||
__aligned_u64 tgt;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -816,7 +816,7 @@ struct vfio_device_gfx_plane_info {
|
|||
__u32 drm_plane_type; /* type of plane: DRM_PLANE_TYPE_* */
|
||||
/* out */
|
||||
__u32 drm_format; /* drm format of plane */
|
||||
__u64 drm_format_mod; /* tiled mode */
|
||||
__aligned_u64 drm_format_mod; /* tiled mode */
|
||||
__u32 width; /* width of plane */
|
||||
__u32 height; /* height of plane */
|
||||
__u32 stride; /* stride of plane */
|
||||
|
|
@ -829,6 +829,7 @@ struct vfio_device_gfx_plane_info {
|
|||
__u32 region_index; /* region index */
|
||||
__u32 dmabuf_id; /* dma-buf id */
|
||||
};
|
||||
__u32 reserved;
|
||||
};
|
||||
|
||||
#define VFIO_DEVICE_QUERY_GFX_PLANE _IO(VFIO_TYPE, VFIO_BASE + 14)
|
||||
|
|
@ -863,9 +864,10 @@ struct vfio_device_ioeventfd {
|
|||
#define VFIO_DEVICE_IOEVENTFD_32 (1 << 2) /* 4-byte write */
|
||||
#define VFIO_DEVICE_IOEVENTFD_64 (1 << 3) /* 8-byte write */
|
||||
#define VFIO_DEVICE_IOEVENTFD_SIZE_MASK (0xf)
|
||||
__u64 offset; /* device fd offset of write */
|
||||
__u64 data; /* data to be written */
|
||||
__aligned_u64 offset; /* device fd offset of write */
|
||||
__aligned_u64 data; /* data to be written */
|
||||
__s32 fd; /* -1 for de-assignment */
|
||||
__u32 reserved;
|
||||
};
|
||||
|
||||
#define VFIO_DEVICE_IOEVENTFD _IO(VFIO_TYPE, VFIO_BASE + 16)
|
||||
|
|
@ -1434,6 +1436,27 @@ struct vfio_device_feature_mig_data_size {
|
|||
|
||||
#define VFIO_DEVICE_FEATURE_MIG_DATA_SIZE 9
|
||||
|
||||
/**
|
||||
* Upon VFIO_DEVICE_FEATURE_SET, set or clear the BUS mastering for the device
|
||||
* based on the operation specified in op flag.
|
||||
*
|
||||
* The functionality is incorporated for devices that needs bus master control,
|
||||
* but the in-band device interface lacks the support. Consequently, it is not
|
||||
* applicable to PCI devices, as bus master control for PCI devices is managed
|
||||
* in-band through the configuration space. At present, this feature is supported
|
||||
* only for CDX devices.
|
||||
* When the device's BUS MASTER setting is configured as CLEAR, it will result in
|
||||
* blocking all incoming DMA requests from the device. On the other hand, configuring
|
||||
* the device's BUS MASTER setting as SET (enable) will grant the device the
|
||||
* capability to perform DMA to the host memory.
|
||||
*/
|
||||
struct vfio_device_feature_bus_master {
|
||||
__u32 op;
|
||||
#define VFIO_DEVICE_FEATURE_CLEAR_MASTER 0 /* Clear Bus Master */
|
||||
#define VFIO_DEVICE_FEATURE_SET_MASTER 1 /* Set Bus Master */
|
||||
};
|
||||
#define VFIO_DEVICE_FEATURE_BUS_MASTER 10
|
||||
|
||||
/* -------- API for Type1 VFIO IOMMU -------- */
|
||||
|
||||
/**
|
||||
|
|
@ -1449,7 +1472,7 @@ struct vfio_iommu_type1_info {
|
|||
__u32 flags;
|
||||
#define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */
|
||||
#define VFIO_IOMMU_INFO_CAPS (1 << 1) /* Info supports caps */
|
||||
__u64 iova_pgsizes; /* Bitmap of supported page sizes */
|
||||
__aligned_u64 iova_pgsizes; /* Bitmap of supported page sizes */
|
||||
__u32 cap_offset; /* Offset within info struct of first cap */
|
||||
__u32 pad;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -219,4 +219,12 @@
|
|||
*/
|
||||
#define VHOST_VDPA_RESUME _IO(VHOST_VIRTIO, 0x7E)
|
||||
|
||||
/* Get the group for the descriptor table including driver & device areas
|
||||
* of a virtqueue: read index, write group in num.
|
||||
* The virtqueue index is stored in the index field of vhost_vring_state.
|
||||
* The group ID of the descriptor table for this specific virtqueue
|
||||
* is returned via num field of vhost_vring_state.
|
||||
*/
|
||||
#define VHOST_VDPA_GET_VRING_DESC_GROUP _IOWR(VHOST_VIRTIO, 0x7F, \
|
||||
struct vhost_vring_state)
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue