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hw/arm/fsl-imx6: Add local 'mpcore/gic' variables

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The A9MPCore forward the IRQs from its internal GIC.
To make the code clearer, add the 'mpcore' and 'gic'
variables.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250130112615.3219-3-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-02-07 16:09:18 +00:00 • committed by Peter Maydell
parent cbb95d4968
commit eead29c0e7
1 changed files with 21 additions and 31 deletions
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52
hw/arm/fsl-imx6.c
View file

@ -117,6 +117,8 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
uint16_t i;
qemu_irq irq;
unsigned int smp_cpus = ms->smp.cpus;
DeviceState *mpcore = DEVICE(&s->a9mpcore);
DeviceState *gic;
if (smp_cpus > FSL_IMX6_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
@ -143,21 +145,21 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
}
object_property_set_int(OBJECT(&s->a9mpcore), "num-cpu", smp_cpus,
&error_abort);
object_property_set_int(OBJECT(mpcore), "num-cpu", smp_cpus, &error_abort);
object_property_set_int(OBJECT(&s->a9mpcore), "num-irq",
object_property_set_int(OBJECT(mpcore), "num-irq",
FSL_IMX6_MAX_IRQ + GIC_INTERNAL, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->a9mpcore), errp)) {
if (!sysbus_realize(SYS_BUS_DEVICE(mpcore), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->a9mpcore), 0, FSL_IMX6_A9MPCORE_ADDR);
sysbus_mmio_map(SYS_BUS_DEVICE(mpcore), 0, FSL_IMX6_A9MPCORE_ADDR);
gic = mpcore;
for (i = 0; i < smp_cpus; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(&s->a9mpcore), i,
sysbus_connect_irq(SYS_BUS_DEVICE(gic), i,
qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->a9mpcore), i + smp_cpus,
sysbus_connect_irq(SYS_BUS_DEVICE(gic), i + smp_cpus,
qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_FIQ));
}
@ -195,8 +197,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
serial_table[i].irq));
qdev_get_gpio_in(gic, serial_table[i].irq));
}
s->gpt.ccm = IMX_CCM(&s->ccm);
@ -207,8 +208,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt), 0, FSL_IMX6_GPT_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_GPT_IRQ));
qdev_get_gpio_in(gic, FSL_IMX6_GPT_IRQ));
/* Initialize all EPIT timers */
for (i = 0; i < FSL_IMX6_NUM_EPITS; i++) {
@ -228,8 +228,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
epit_table[i].irq));
qdev_get_gpio_in(gic, epit_table[i].irq));
}
/* Initialize all I2C */
@ -249,8 +248,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
i2c_table[i].irq));
qdev_get_gpio_in(gic, i2c_table[i].irq));
}
/* Initialize all GPIOs */
@ -307,11 +305,9 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
gpio_table[i].irq_low));
qdev_get_gpio_in(gic, gpio_table[i].irq_low));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
gpio_table[i].irq_high));
qdev_get_gpio_in(gic, gpio_table[i].irq_high));
}
/* Initialize all SDHC */
@ -338,8 +334,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
esdhc_table[i].irq));
qdev_get_gpio_in(gic, esdhc_table[i].irq));
}
/* USB */
@ -360,8 +355,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
FSL_IMX6_USBOH3_USB_ADDR + i * 0x200);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_USBn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6_USBn_IRQ[i]));
}
/* Initialize all ECSPI */
@ -384,8 +378,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_table[i].addr);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
spi_table[i].irq));
qdev_get_gpio_in(gic, spi_table[i].irq));
}
object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num,
@ -396,11 +389,9 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth), 0, FSL_IMX6_ENET_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_ENET_MAC_IRQ));
qdev_get_gpio_in(gic, FSL_IMX6_ENET_MAC_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth), 1,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_ENET_MAC_1588_IRQ));
qdev_get_gpio_in(gic, FSL_IMX6_ENET_MAC_1588_IRQ));
/*
* SNVS
@ -427,8 +418,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6_WDOGn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0,
qdev_get_gpio_in(DEVICE(&s->a9mpcore),
FSL_IMX6_WDOGn_IRQ[i]));
qdev_get_gpio_in(gic, FSL_IMX6_WDOGn_IRQ[i]));
}
/*