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Replace TARGET_WORDS_BIGENDIAN

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Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done
with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1,
and thus should always be defined to prevent misuse.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Suggested-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Marc-André Lureau 2022-03-23 19:57:18 +04:00 • committed by Paolo Bonzini
parent e03b56863d
commit ee3eb3a7ce
83 changed files with 120 additions and 116 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target/xtensa/cpu.h
View file

@ -590,7 +590,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
#define XTENSA_CPU_TYPE_NAME(model) model XTENSA_CPU_TYPE_SUFFIX
#define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
#ifdef TARGET_WORDS_BIGENDIAN
#if TARGET_BIG_ENDIAN
#define XTENSA_DEFAULT_CPU_MODEL "fsf"
#define XTENSA_DEFAULT_CPU_NOMMU_MODEL "fsf"
#else

2
target/xtensa/overlay_tool.h
View file

@ -449,7 +449,7 @@
#endif
#if (defined(TARGET_WORDS_BIGENDIAN) != 0) == (XCHAL_HAVE_BE != 0)
#if TARGET_BIG_ENDIAN == (XCHAL_HAVE_BE != 0)
#define REGISTER_CORE(core) \
static void __attribute__((constructor)) register_core(void) \
{ \

6
target/xtensa/translate.c
View file

@ -1471,14 +1471,14 @@ static void translate_b(DisasContext *dc, const OpcodeArg arg[],
static void translate_bb(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
#ifdef TARGET_WORDS_BIGENDIAN
#if TARGET_BIG_ENDIAN
TCGv_i32 bit = tcg_const_i32(0x80000000u);
#else
TCGv_i32 bit = tcg_const_i32(0x00000001u);
#endif
TCGv_i32 tmp = tcg_temp_new_i32();
tcg_gen_andi_i32(tmp, arg[1].in, 0x1f);
#ifdef TARGET_WORDS_BIGENDIAN
#if TARGET_BIG_ENDIAN
tcg_gen_shr_i32(bit, bit, tmp);
#else
tcg_gen_shl_i32(bit, bit, tmp);
@ -1493,7 +1493,7 @@ static void translate_bbi(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[])
{
TCGv_i32 tmp = tcg_temp_new_i32();
#ifdef TARGET_WORDS_BIGENDIAN
#if TARGET_BIG_ENDIAN
tcg_gen_andi_i32(tmp, arg[0].in, 0x80000000u >> arg[1].imm);
#else
tcg_gen_andi_i32(tmp, arg[0].in, 0x00000001u << arg[1].imm);