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Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair

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Similar to previous cleanup of gen_log_predicated_reg_write

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-3-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Taylor Simpson 2021-04-08 20:07:30 -05:00 • committed by Richard Henderson
parent d799f8ad08
commit edf26ade43
1 changed files with 13 additions and 14 deletions
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27
target/hexagon/genptr.c
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@ -69,36 +69,35 @@ static inline void gen_log_reg_write(int rnum, TCGv val)
static void gen_log_predicated_reg_write_pair(int rnum, TCGv_i64 val, int slot) static void gen_log_predicated_reg_write_pair(int rnum, TCGv_i64 val, int slot)
{ {
TCGv val32 = tcg_temp_new(); TCGv val32 = tcg_temp_new();
TCGv one = tcg_const_tl(1);
TCGv zero = tcg_const_tl(0); TCGv zero = tcg_const_tl(0);
TCGv slot_mask = tcg_temp_new(); TCGv slot_mask = tcg_temp_new();
tcg_gen_andi_tl(slot_mask, hex_slot_cancelled, 1 << slot); tcg_gen_andi_tl(slot_mask, hex_slot_cancelled, 1 << slot);
/* Low word */ /* Low word */
tcg_gen_extrl_i64_i32(val32, val); tcg_gen_extrl_i64_i32(val32, val);
tcg_gen_movcond_tl(TCG_COND_EQ, hex_new_value[rnum], slot_mask, zero, tcg_gen_movcond_tl(TCG_COND_EQ, hex_new_value[rnum],
val32, hex_new_value[rnum]);
#if HEX_DEBUG
/* Do this so HELPER(debug_commit_end) will know */
tcg_gen_movcond_tl(TCG_COND_EQ, hex_reg_written[rnum],
slot_mask, zero, slot_mask, zero,
one, hex_reg_written[rnum]); val32, hex_new_value[rnum]);
#endif
/* High word */ /* High word */
tcg_gen_extrh_i64_i32(val32, val); tcg_gen_extrh_i64_i32(val32, val);
tcg_gen_movcond_tl(TCG_COND_EQ, hex_new_value[rnum + 1], tcg_gen_movcond_tl(TCG_COND_EQ, hex_new_value[rnum + 1],
slot_mask, zero, slot_mask, zero,
val32, hex_new_value[rnum + 1]); val32, hex_new_value[rnum + 1]);
#if HEX_DEBUG #if HEX_DEBUG
/* Do this so HELPER(debug_commit_end) will know */ /*
tcg_gen_movcond_tl(TCG_COND_EQ, hex_reg_written[rnum + 1], * Do this so HELPER(debug_commit_end) will know
slot_mask, zero, *
one, hex_reg_written[rnum + 1]); * Note that slot_mask indicates the value is not written
* (i.e., slot was cancelled), so we create a true/false value before
* or'ing with hex_reg_written[rnum].
*/
tcg_gen_setcond_tl(TCG_COND_EQ, slot_mask, slot_mask, zero);
tcg_gen_or_tl(hex_reg_written[rnum], hex_reg_written[rnum], slot_mask);
tcg_gen_or_tl(hex_reg_written[rnum + 1], hex_reg_written[rnum + 1],
slot_mask);
#endif #endif
tcg_temp_free(val32); tcg_temp_free(val32);
tcg_temp_free(one);
tcg_temp_free(zero); tcg_temp_free(zero);
tcg_temp_free(slot_mask); tcg_temp_free(slot_mask);
} }