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Pflash and firmware configuration patches for 2019-03-11

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Merge remote-tracking branch 'remotes/armbru/tags/pull-pflash-2019-03-11' into staging

Pflash and firmware configuration patches for 2019-03-11

# gpg: Signature made Mon 11 Mar 2019 21:59:12 GMT
# gpg:                using RSA key 3870B400EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-pflash-2019-03-11: (27 commits)
  docs/interop/firmware.json: Prefer -machine to if=pflash
  pc: Support firmware configuration with -blockdev
  pc_sysfw: Pass PCMachineState to pc_system_firmware_init()
  pc_sysfw: Remove unused PcSysFwDevice
  pflash_cfi01: Add pflash_cfi01_get_blk() helper
  vl: Create block backends before setting machine properties
  vl: Factor configure_blockdev() out of main()
  vl: Improve legibility of BlockdevOptions queue
  sysbus: Fix latent bug with onboard devices
  vl: Fix latent bug with -global and onboard devices
  qom: Move compat_props machinery from qdev to QOM
  qdev: Fix latent bug with compat_props and onboard devices
  pflash: Clean up after commit 368a354f02, part 2
  pflash: Clean up after commit 368a354f02, part 1
  mips_malta: Clean up definition of flash memory size somewhat
  hw/mips/malta: Restrict 'bios_size' variable scope
  hw/mips/malta: Remove fl_sectors variable
  mips_malta: Delete disabled, broken DEBUG_BOARD_INIT code
  r2d: Fix flash memory size, sector size, width, device ID
  ppc405_boards: Don't size flash memory to match backing image
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2019-03-12 11:12:36 +00:00
commit eda1df0345
36 changed files with 547 additions and 489 deletions
Download patch file Download diff file Expand all files Collapse all files

102
hw/ppc/ppc405_boards.c
View file

@ -48,8 +48,6 @@
#define USE_FLASH_BIOS
//#define DEBUG_BOARD_INIT
/*****************************************************************************/
/* PPC405EP reference board (IBM) */
/* Standalone board with:
@ -158,7 +156,7 @@ static void ref405ep_init(MachineState *machine)
target_ulong kernel_base, initrd_base;
long kernel_size, initrd_size;
int linux_boot;
int fl_idx, fl_sectors, len;
int len;
DriveInfo *dinfo;
MemoryRegion *sysmem = get_system_memory();
@ -171,9 +169,6 @@ static void ref405ep_init(MachineState *machine)
ram_bases[1] = 0x00000000;
ram_sizes[1] = 0x00000000;
ram_size = 128 * MiB;
#ifdef DEBUG_BOARD_INIT
printf("%s: register cpu\n", __func__);
#endif
env = ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
@ -182,35 +177,19 @@ static void ref405ep_init(MachineState *machine)
&error_fatal);
memory_region_add_subregion(sysmem, 0xFFF00000, sram);
/* allocate and load BIOS */
#ifdef DEBUG_BOARD_INIT
printf("%s: register BIOS\n", __func__);
#endif
fl_idx = 0;
#ifdef USE_FLASH_BIOS
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
dinfo = drive_get(IF_PFLASH, 0, 0);
if (dinfo) {
BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
bios_size = blk_getlength(blk);
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size %lx"
" at addr %lx '%s' %d\n",
fl_idx, bios_size, -bios_size,
blk_name(blk), fl_sectors);
#endif
bios_size = 8 * MiB;
pflash_cfi02_register((uint32_t)(-bios_size),
NULL, "ef405ep.bios", bios_size,
blk, 65536, fl_sectors, 1,
"ef405ep.bios", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, 1,
2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
} else
#endif
{
#ifdef DEBUG_BOARD_INIT
printf("Load BIOS from file\n");
#endif
bios = g_new(MemoryRegion, 1);
memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE,
&error_fatal);
@ -239,21 +218,12 @@ static void ref405ep_init(MachineState *machine)
memory_region_set_readonly(bios, true);
}
/* Register FPGA */
#ifdef DEBUG_BOARD_INIT
printf("%s: register FPGA\n", __func__);
#endif
ref405ep_fpga_init(sysmem, 0xF0300000);
/* Register NVRAM */
#ifdef DEBUG_BOARD_INIT
printf("%s: register NVRAM\n", __func__);
#endif
m48t59_init(NULL, 0xF0000000, 0, 8192, 1968, 8);
/* Load kernel */
linux_boot = (kernel_filename != NULL);
if (linux_boot) {
#ifdef DEBUG_BOARD_INIT
printf("%s: load kernel\n", __func__);
#endif
memset(&bd, 0, sizeof(bd));
bd.bi_memstart = 0x00000000;
bd.bi_memsize = ram_size;
@ -325,10 +295,6 @@ static void ref405ep_init(MachineState *machine)
initrd_size = 0;
bdloc = 0;
}
#ifdef DEBUG_BOARD_INIT
printf("bdloc " RAM_ADDR_FMT "\n", bdloc);
printf("%s: Done\n", __func__);
#endif
}
static void ref405ep_class_init(ObjectClass *oc, void *data)
@ -455,7 +421,7 @@ static void taihu_405ep_init(MachineState *machine)
target_ulong kernel_base, initrd_base;
long kernel_size, initrd_size;
int linux_boot;
int fl_idx, fl_sectors;
int fl_idx;
DriveInfo *dinfo;
/* RAM is soldered to the board so the size cannot be changed */
@ -473,43 +439,24 @@ static void taihu_405ep_init(MachineState *machine)
memory_region_init_alias(&ram_memories[1], NULL,
"taihu_405ep.ram-1", ram, ram_bases[1],
ram_sizes[1]);
#ifdef DEBUG_BOARD_INIT
printf("%s: register cpu\n", __func__);
#endif
ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate and load BIOS */
#ifdef DEBUG_BOARD_INIT
printf("%s: register BIOS\n", __func__);
#endif
fl_idx = 0;
#if defined(USE_FLASH_BIOS)
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
if (dinfo) {
BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
bios_size = blk_getlength(blk);
/* XXX: should check that size is 2MB */
// bios_size = 2 * 1024 * 1024;
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size %lx"
" at addr %lx '%s' %d\n",
fl_idx, bios_size, -bios_size,
blk_name(blk), fl_sectors);
#endif
pflash_cfi02_register((uint32_t)(-bios_size),
NULL, "taihu_405ep.bios", bios_size,
blk, 65536, fl_sectors, 1,
bios_size = 2 * MiB;
pflash_cfi02_register(0xFFE00000,
"taihu_405ep.bios", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
} else
#endif
{
#ifdef DEBUG_BOARD_INIT
printf("Load BIOS from file\n");
#endif
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
bios = g_new(MemoryRegion, 1);
@ -536,35 +483,19 @@ static void taihu_405ep_init(MachineState *machine)
/* Register Linux flash */
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
if (dinfo) {
BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
bios_size = blk_getlength(blk);
/* XXX: should check that size is 32MB */
bios_size = 32 * MiB;
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size %lx"
" at addr " TARGET_FMT_lx " '%s'\n",
fl_idx, bios_size, (target_ulong)0xfc000000,
blk_name(blk));
#endif
pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size,
blk, 65536, fl_sectors, 1,
pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, 1,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
}
/* Register CLPD & LCD display */
#ifdef DEBUG_BOARD_INIT
printf("%s: register CPLD\n", __func__);
#endif
taihu_cpld_init(sysmem, 0x50100000);
/* Load kernel */
linux_boot = (kernel_filename != NULL);
if (linux_boot) {
#ifdef DEBUG_BOARD_INIT
printf("%s: load kernel\n", __func__);
#endif
kernel_base = KERNEL_LOAD_ADDR;
/* now we can load the kernel */
kernel_size = load_image_targphys(kernel_filename, kernel_base,
@ -593,9 +524,6 @@ static void taihu_405ep_init(MachineState *machine)
initrd_base = 0;
initrd_size = 0;
}
#ifdef DEBUG_BOARD_INIT
printf("%s: Done\n", __func__);
#endif
}
static void taihu_class_init(ObjectClass *oc, void *data)

42
hw/ppc/sam460ex.c
View file

@ -91,32 +91,42 @@ struct boot_info {
static int sam460ex_load_uboot(void)
{
/*
* This first creates 1MiB of flash memory mapped at the end of
* the 32-bit address space (0xFFF00000..0xFFFFFFFF).
*
* If_PFLASH unit 0 is defined, the flash memory is initialized
* from that block backend.
*
* Else, it's initialized to zero. And then 512KiB of ROM get
* mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
* initialized from u-boot-sam460-20100605.bin.
*
* This doesn't smell right.
*
* The physical hardware appears to have 512KiB flash memory.
*
* TODO Figure out what we really need here, and clean this up.
*/
DriveInfo *dinfo;
BlockBackend *blk = NULL;
hwaddr base = FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32);
long bios_size = FLASH_SIZE;
int fl_sectors;
dinfo = drive_get(IF_PFLASH, 0, 0);
if (dinfo) {
blk = blk_by_legacy_dinfo(dinfo);
bios_size = blk_getlength(blk);
}
fl_sectors = (bios_size + 65535) >> 16;
if (!pflash_cfi01_register(base, NULL, "sam460ex.flash", bios_size,
blk, 64 * KiB, fl_sectors,
1, 0x89, 0x18, 0x0000, 0x0, 1)) {
if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
"sam460ex.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
error_report("Error registering flash memory");
/* XXX: return an error instead? */
exit(1);
}
if (!blk) {
if (!dinfo) {
/*error_report("No flash image given with the 'pflash' parameter,"
" using default u-boot image");*/
base = UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32);
rom_add_file_fixed(UBOOT_FILENAME, base, -1);
rom_add_file_fixed(UBOOT_FILENAME,
UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
-1);
}
return 0;

5
hw/ppc/virtex_ml507.c
View file

@ -226,10 +226,9 @@ static void virtex_init(MachineState *machine)
memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi01_register(PFLASH_BASEADDR, NULL, "virtex.flash", FLASH_SIZE,
pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
64 * KiB, FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1);
cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
dev = qdev_create(NULL, "xlnx.xps-intc");