hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object

This object is used to represent every multiplexer in the clock tree as
well as every clock output, every presecaler, frequency multiplier, etc.
This allows to use a generic approach for every component of the clock tree
(except the PLLs).

The migration handling is based on hw/misc/zynq_sclr.c.
Three phase reset will be handled in a later commit.

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20240303140643.81957-3-arnaud.minier@telecom-paris.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Arnaud Minier 2024-03-03 15:06:37 +01:00 committed by Peter Maydell
parent d6b55a0fe9
commit ec7d83acbd
4 changed files with 313 additions and 0 deletions

View file

@ -21,6 +21,8 @@
#include "hw/registerfields.h"
#include "hw/misc/stm32l4x5_rcc.h"
#define TYPE_RCC_CLOCK_MUX "stm32l4x5-rcc-clock-mux"
OBJECT_DECLARE_SIMPLE_TYPE(RccClockMuxState, RCC_CLOCK_MUX)
/* Register map */
REG32(CR, 0x00)
@ -283,4 +285,31 @@ REG32(CSR, 0x94)
R_CSR_FWRSTF_MASK | \
R_CSR_LSIRDY_MASK)
typedef enum RccClockMuxSource {
RCC_CLOCK_MUX_SRC_GND = 0,
RCC_CLOCK_MUX_SRC_HSI,
RCC_CLOCK_MUX_SRC_HSE,
RCC_CLOCK_MUX_SRC_MSI,
RCC_CLOCK_MUX_SRC_LSI,
RCC_CLOCK_MUX_SRC_LSE,
RCC_CLOCK_MUX_SRC_SAI1_EXTCLK,
RCC_CLOCK_MUX_SRC_SAI2_EXTCLK,
RCC_CLOCK_MUX_SRC_PLL,
RCC_CLOCK_MUX_SRC_PLLSAI1,
RCC_CLOCK_MUX_SRC_PLLSAI2,
RCC_CLOCK_MUX_SRC_PLLSAI3,
RCC_CLOCK_MUX_SRC_PLL48M1,
RCC_CLOCK_MUX_SRC_PLL48M2,
RCC_CLOCK_MUX_SRC_PLLADC1,
RCC_CLOCK_MUX_SRC_PLLADC2,
RCC_CLOCK_MUX_SRC_SYSCLK,
RCC_CLOCK_MUX_SRC_HCLK,
RCC_CLOCK_MUX_SRC_PCLK1,
RCC_CLOCK_MUX_SRC_PCLK2,
RCC_CLOCK_MUX_SRC_HSE_OVER_32,
RCC_CLOCK_MUX_SRC_LCD_AND_RTC_COMMON,
RCC_CLOCK_MUX_SRC_NUMBER,
} RccClockMuxSource;
#endif /* HW_STM32L4X5_RCC_INTERNALS_H */