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tcg: If DEBUG_TCGV, distinguish TCGv_ptr from TCGv_i32/TCGv_i64
When compiling with DEBUG_TCGV enabled, make the TCGv_ptr type distinct from TCGv_i32/TCGv_i64. This means that using an i32 or i64 TCG op to manipulate a TCGv_ptr will always be detected at compile time, rather than only if compiling on a host system with the other word size. NB: the tcg_add_ptr and tcg_sub_ptr macros have been removed as they were not used anywhere. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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parent
6bd4b08ab2
commit
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2 changed files with 50 additions and 28 deletions
26
tcg/tcg-op.h
26
tcg/tcg-op.h
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@ -2304,8 +2304,8 @@ static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
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#endif
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}
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#define tcg_gen_ld_ptr tcg_gen_ld_i32
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#define tcg_gen_discard_ptr tcg_gen_discard_i32
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#define tcg_gen_ld_ptr(R, A, O) tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
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#define tcg_gen_discard_ptr(A) tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A))
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#else /* TCG_TARGET_REG_BITS == 32 */
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@ -2372,8 +2372,8 @@ static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
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tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_st64, arg, addr, mem_index);
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}
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#define tcg_gen_ld_ptr tcg_gen_ld_i64
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#define tcg_gen_discard_ptr tcg_gen_discard_i64
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#define tcg_gen_ld_ptr(R, A, O) tcg_gen_ld_i64(TCGV_PTR_TO_NAT(R), (A), (O))
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#define tcg_gen_discard_ptr(A) tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A))
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#endif /* TCG_TARGET_REG_BITS != 32 */
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@ -2523,11 +2523,17 @@ static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
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#endif
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#if TCG_TARGET_REG_BITS == 32
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#define tcg_gen_add_ptr tcg_gen_add_i32
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#define tcg_gen_addi_ptr tcg_gen_addi_i32
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#define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
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#define tcg_gen_add_ptr(R, A, B) tcg_gen_add_i32(TCGV_PTR_TO_NAT(R), \
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TCGV_PTR_TO_NAT(A), \
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TCGV_PTR_TO_NAT(B))
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#define tcg_gen_addi_ptr(R, A, B) tcg_gen_addi_i32(TCGV_PTR_TO_NAT(R), \
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TCGV_PTR_TO_NAT(A), (B))
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#define tcg_gen_ext_i32_ptr(R, A) tcg_gen_mov_i32(TCGV_PTR_TO_NAT(R), (A))
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#else /* TCG_TARGET_REG_BITS == 32 */
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#define tcg_gen_add_ptr tcg_gen_add_i64
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#define tcg_gen_addi_ptr tcg_gen_addi_i64
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#define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
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#define tcg_gen_add_ptr(R, A, B) tcg_gen_add_i64(TCGV_PTR_TO_NAT(R), \
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TCGV_PTR_TO_NAT(A), \
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TCGV_PTR_TO_NAT(B))
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#define tcg_gen_addi_ptr(R, A, B) tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), \
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TCGV_PTR_TO_NAT(A), (B))
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#define tcg_gen_ext_i32_ptr(R, A) tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
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#endif /* TCG_TARGET_REG_BITS != 32 */
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