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aspeed: add a max_ram_size property to the memory controller

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This will be used to construct a memory region beyond the RAM region
to let firmwares scan the address space with load/store to guess how
much RAM the SoC has.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20180807075757.7242-7-joel@jms.id.au
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2018-08-16 14:05:29 +01:00 • committed by Peter Maydell
parent a7b4569a4d
commit ebe31c0a8e
4 changed files with 37 additions and 0 deletions
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1
include/hw/misc/aspeed_sdmc.h
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@ -27,6 +27,7 @@ typedef struct AspeedSDMCState {
uint32_t silicon_rev;
uint32_t ram_bits;
uint64_t ram_size;
uint64_t max_ram_size;
uint32_t fixed_conf;
} AspeedSDMCState;