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hw/arm: versal: Add support for the RTC

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hw/arm: versal: Add support for the RTC.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id: 20200427181649.26851-10-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Edgar E. Iglesias 2020-04-27 20:16:47 +02:00 • committed by Peter Maydell
parent 724c6e12dd
commit eb1221c52d
2 changed files with 29 additions and 0 deletions
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21
hw/arm/xlnx-versal.c
View file

@ -240,6 +240,26 @@ static void versal_create_sds(Versal *s, qemu_irq *pic)
} }
} }
static void versal_create_rtc(Versal *s, qemu_irq *pic)
{
SysBusDevice *sbd;
MemoryRegion *mr;
sysbus_init_child_obj(OBJECT(s), "rtc", &s->pmc.rtc, sizeof(s->pmc.rtc),
TYPE_XLNX_ZYNQMP_RTC);
sbd = SYS_BUS_DEVICE(&s->pmc.rtc);
qdev_init_nofail(DEVICE(sbd));
mr = sysbus_mmio_get_region(sbd, 0);
memory_region_add_subregion(&s->mr_ps, MM_PMC_RTC, mr);
/*
* TODO: Connect the ALARM and SECONDS interrupts once our RTC model
* supports them.
*/
sysbus_connect_irq(sbd, 1, pic[VERSAL_RTC_APB_ERR_IRQ]);
}
/* This takes the board allocated linear DDR memory and creates aliases /* This takes the board allocated linear DDR memory and creates aliases
* for each split DDR range/aperture on the Versal address map. * for each split DDR range/aperture on the Versal address map.
*/ */
@ -323,6 +343,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_gems(s, pic); versal_create_gems(s, pic);
versal_create_admas(s, pic); versal_create_admas(s, pic);
versal_create_sds(s, pic); versal_create_sds(s, pic);
versal_create_rtc(s, pic);
versal_map_ddr(s); versal_map_ddr(s);
versal_unimp(s); versal_unimp(s);

8
include/hw/arm/xlnx-versal.h
View file

@ -19,6 +19,7 @@
#include "hw/char/pl011.h" #include "hw/char/pl011.h"
#include "hw/dma/xlnx-zdma.h" #include "hw/dma/xlnx-zdma.h"
#include "hw/net/cadence_gem.h" #include "hw/net/cadence_gem.h"
#include "hw/rtc/xlnx-zynqmp-rtc.h"
#define TYPE_XLNX_VERSAL "xlnx-versal" #define TYPE_XLNX_VERSAL "xlnx-versal"
#define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL) #define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL)
@ -65,6 +66,8 @@ typedef struct Versal {
struct { struct {
SDHCIState sd[XLNX_VERSAL_NR_SDS]; SDHCIState sd[XLNX_VERSAL_NR_SDS];
} iou; } iou;
XlnxZynqMPRTC rtc;
} pmc; } pmc;
struct { struct {
@ -89,7 +92,10 @@ typedef struct Versal {
#define VERSAL_GEM1_IRQ_0 58 #define VERSAL_GEM1_IRQ_0 58
#define VERSAL_GEM1_WAKE_IRQ_0 59 #define VERSAL_GEM1_WAKE_IRQ_0 59
#define VERSAL_ADMA_IRQ_0 60 #define VERSAL_ADMA_IRQ_0 60
#define VERSAL_RTC_APB_ERR_IRQ 121
#define VERSAL_SD0_IRQ_0 126 #define VERSAL_SD0_IRQ_0 126
#define VERSAL_RTC_ALARM_IRQ 142
#define VERSAL_RTC_SECONDS_IRQ 143
/* Architecturally reserved IRQs suitable for virtualization. */ /* Architecturally reserved IRQs suitable for virtualization. */
#define VERSAL_RSVD_IRQ_FIRST 111 #define VERSAL_RSVD_IRQ_FIRST 111
@ -143,4 +149,6 @@ typedef struct Versal {
#define MM_PMC_SD0_SIZE 0x10000 #define MM_PMC_SD0_SIZE 0x10000
#define MM_PMC_CRP 0xf1260000U #define MM_PMC_CRP 0xf1260000U
#define MM_PMC_CRP_SIZE 0x10000 #define MM_PMC_CRP_SIZE 0x10000
#define MM_PMC_RTC 0xf12a0000
#define MM_PMC_RTC_SIZE 0x10000
#endif #endif