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https://github.com/Motorhead1991/qemu.git
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tcg: Propagate CPUState argument to cpu_req_mo()
In preparation of having tcg_req_mo() access CPUState in the next commit, pass it to cpu_req_mo(), its single caller. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
9c1f8062d4
commit
eacd8c7cef
3 changed files with 22 additions and 21 deletions
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@ -2324,7 +2324,7 @@ static uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
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MMULookupLocals l;
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MMULookupLocals l;
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bool crosspage;
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bool crosspage;
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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crosspage = mmu_lookup(cpu, addr, oi, ra, access_type, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, access_type, &l);
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tcg_debug_assert(!crosspage);
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tcg_debug_assert(!crosspage);
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@ -2339,7 +2339,7 @@ static uint16_t do_ld2_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
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uint16_t ret;
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uint16_t ret;
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uint8_t a, b;
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uint8_t a, b;
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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crosspage = mmu_lookup(cpu, addr, oi, ra, access_type, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, access_type, &l);
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if (likely(!crosspage)) {
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if (likely(!crosspage)) {
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return do_ld_2(cpu, &l.page[0], l.mmu_idx, access_type, l.memop, ra);
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return do_ld_2(cpu, &l.page[0], l.mmu_idx, access_type, l.memop, ra);
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@ -2363,7 +2363,7 @@ static uint32_t do_ld4_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
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bool crosspage;
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bool crosspage;
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uint32_t ret;
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uint32_t ret;
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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crosspage = mmu_lookup(cpu, addr, oi, ra, access_type, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, access_type, &l);
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if (likely(!crosspage)) {
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if (likely(!crosspage)) {
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return do_ld_4(cpu, &l.page[0], l.mmu_idx, access_type, l.memop, ra);
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return do_ld_4(cpu, &l.page[0], l.mmu_idx, access_type, l.memop, ra);
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@ -2384,7 +2384,7 @@ static uint64_t do_ld8_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
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bool crosspage;
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bool crosspage;
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uint64_t ret;
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uint64_t ret;
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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crosspage = mmu_lookup(cpu, addr, oi, ra, access_type, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, access_type, &l);
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if (likely(!crosspage)) {
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if (likely(!crosspage)) {
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return do_ld_8(cpu, &l.page[0], l.mmu_idx, access_type, l.memop, ra);
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return do_ld_8(cpu, &l.page[0], l.mmu_idx, access_type, l.memop, ra);
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@ -2407,7 +2407,7 @@ static Int128 do_ld16_mmu(CPUState *cpu, vaddr addr,
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Int128 ret;
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Int128 ret;
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int first;
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int first;
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_LOAD, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_LOAD, &l);
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if (likely(!crosspage)) {
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if (likely(!crosspage)) {
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if (unlikely(l.page[0].flags & TLB_MMIO)) {
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if (unlikely(l.page[0].flags & TLB_MMIO)) {
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@ -2735,7 +2735,7 @@ static void do_st1_mmu(CPUState *cpu, vaddr addr, uint8_t val,
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MMULookupLocals l;
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MMULookupLocals l;
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bool crosspage;
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bool crosspage;
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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tcg_debug_assert(!crosspage);
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tcg_debug_assert(!crosspage);
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@ -2749,7 +2749,7 @@ static void do_st2_mmu(CPUState *cpu, vaddr addr, uint16_t val,
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bool crosspage;
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bool crosspage;
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uint8_t a, b;
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uint8_t a, b;
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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if (likely(!crosspage)) {
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if (likely(!crosspage)) {
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do_st_2(cpu, &l.page[0], val, l.mmu_idx, l.memop, ra);
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do_st_2(cpu, &l.page[0], val, l.mmu_idx, l.memop, ra);
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@ -2771,7 +2771,7 @@ static void do_st4_mmu(CPUState *cpu, vaddr addr, uint32_t val,
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MMULookupLocals l;
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MMULookupLocals l;
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bool crosspage;
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bool crosspage;
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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if (likely(!crosspage)) {
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if (likely(!crosspage)) {
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do_st_4(cpu, &l.page[0], val, l.mmu_idx, l.memop, ra);
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do_st_4(cpu, &l.page[0], val, l.mmu_idx, l.memop, ra);
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@ -2792,7 +2792,7 @@ static void do_st8_mmu(CPUState *cpu, vaddr addr, uint64_t val,
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MMULookupLocals l;
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MMULookupLocals l;
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bool crosspage;
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bool crosspage;
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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if (likely(!crosspage)) {
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if (likely(!crosspage)) {
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do_st_8(cpu, &l.page[0], val, l.mmu_idx, l.memop, ra);
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do_st_8(cpu, &l.page[0], val, l.mmu_idx, l.memop, ra);
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@ -2815,7 +2815,7 @@ static void do_st16_mmu(CPUState *cpu, vaddr addr, Int128 val,
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uint64_t a, b;
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uint64_t a, b;
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int first;
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int first;
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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crosspage = mmu_lookup(cpu, addr, oi, ra, MMU_DATA_STORE, &l);
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if (likely(!crosspage)) {
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if (likely(!crosspage)) {
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if (unlikely(l.page[0].flags & TLB_MMIO)) {
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if (unlikely(l.page[0].flags & TLB_MMIO)) {
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@ -59,12 +59,13 @@ G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
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/**
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/**
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* cpu_req_mo:
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* cpu_req_mo:
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* @cpu: CPUState
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* @type: TCGBar
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* @type: TCGBar
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*
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*
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* If tcg_req_mo indicates a barrier for @type is required
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* If tcg_req_mo indicates a barrier for @type is required
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* for the guest memory model, issue a host memory barrier.
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* for the guest memory model, issue a host memory barrier.
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*/
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*/
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#define cpu_req_mo(type) \
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#define cpu_req_mo(cpu, type) \
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do { \
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do { \
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if (tcg_req_mo(type)) { \
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if (tcg_req_mo(type)) { \
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smp_mb(); \
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smp_mb(); \
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@ -1061,7 +1061,7 @@ static uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
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void *haddr;
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void *haddr;
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uint8_t ret;
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uint8_t ret;
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, access_type);
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haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, access_type);
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ret = ldub_p(haddr);
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ret = ldub_p(haddr);
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clear_helper_retaddr();
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clear_helper_retaddr();
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@ -1075,7 +1075,7 @@ static uint16_t do_ld2_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
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uint16_t ret;
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uint16_t ret;
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MemOp mop = get_memop(oi);
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MemOp mop = get_memop(oi);
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type);
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ret = load_atom_2(cpu, ra, haddr, mop);
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ret = load_atom_2(cpu, ra, haddr, mop);
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clear_helper_retaddr();
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clear_helper_retaddr();
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@ -1093,7 +1093,7 @@ static uint32_t do_ld4_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
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uint32_t ret;
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uint32_t ret;
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MemOp mop = get_memop(oi);
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MemOp mop = get_memop(oi);
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type);
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ret = load_atom_4(cpu, ra, haddr, mop);
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ret = load_atom_4(cpu, ra, haddr, mop);
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clear_helper_retaddr();
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clear_helper_retaddr();
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@ -1111,7 +1111,7 @@ static uint64_t do_ld8_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
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uint64_t ret;
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uint64_t ret;
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MemOp mop = get_memop(oi);
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MemOp mop = get_memop(oi);
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type);
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ret = load_atom_8(cpu, ra, haddr, mop);
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ret = load_atom_8(cpu, ra, haddr, mop);
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clear_helper_retaddr();
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clear_helper_retaddr();
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@ -1130,7 +1130,7 @@ static Int128 do_ld16_mmu(CPUState *cpu, abi_ptr addr,
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MemOp mop = get_memop(oi);
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MemOp mop = get_memop(oi);
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tcg_debug_assert((mop & MO_SIZE) == MO_128);
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tcg_debug_assert((mop & MO_SIZE) == MO_128);
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cpu_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_LOAD);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_LOAD);
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ret = load_atom_16(cpu, ra, haddr, mop);
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ret = load_atom_16(cpu, ra, haddr, mop);
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clear_helper_retaddr();
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clear_helper_retaddr();
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@ -1146,7 +1146,7 @@ static void do_st1_mmu(CPUState *cpu, vaddr addr, uint8_t val,
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{
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{
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void *haddr;
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void *haddr;
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, MMU_DATA_STORE);
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haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, MMU_DATA_STORE);
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stb_p(haddr, val);
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stb_p(haddr, val);
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clear_helper_retaddr();
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clear_helper_retaddr();
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@ -1158,7 +1158,7 @@ static void do_st2_mmu(CPUState *cpu, vaddr addr, uint16_t val,
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void *haddr;
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void *haddr;
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MemOp mop = get_memop(oi);
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MemOp mop = get_memop(oi);
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE);
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if (mop & MO_BSWAP) {
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if (mop & MO_BSWAP) {
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@ -1174,7 +1174,7 @@ static void do_st4_mmu(CPUState *cpu, vaddr addr, uint32_t val,
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void *haddr;
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void *haddr;
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MemOp mop = get_memop(oi);
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MemOp mop = get_memop(oi);
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE);
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if (mop & MO_BSWAP) {
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if (mop & MO_BSWAP) {
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@ -1190,7 +1190,7 @@ static void do_st8_mmu(CPUState *cpu, vaddr addr, uint64_t val,
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void *haddr;
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void *haddr;
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MemOp mop = get_memop(oi);
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MemOp mop = get_memop(oi);
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE);
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if (mop & MO_BSWAP) {
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if (mop & MO_BSWAP) {
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@ -1206,7 +1206,7 @@ static void do_st16_mmu(CPUState *cpu, vaddr addr, Int128 val,
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void *haddr;
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void *haddr;
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MemOpIdx mop = get_memop(oi);
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MemOpIdx mop = get_memop(oi);
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cpu_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
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cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE);
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haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE);
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if (mop & MO_BSWAP) {
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if (mop & MO_BSWAP) {
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