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target/mips: Remove vendor specific CPU definitions
Vendor specific CPU definitions are not very useful. Use the ISA definitions instead, which are more helpful when looking at the various CPU definitions. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210112210152.2072996-4-f4bug@amsat.org>
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2 changed files with 7 additions and 10 deletions
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@ -60,9 +60,6 @@
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#define CPU_MIPS3 (CPU_MIPS2 | ISA_MIPS3)
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#define CPU_MIPS4 (CPU_MIPS3 | ISA_MIPS4)
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#define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5)
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#define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX)
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#define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E)
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#define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F | ASE_LMMI)
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#define CPU_MIPS64 (ISA_MIPS3)
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@ -86,8 +83,6 @@
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#define CPU_MIPS32R6 (CPU_MIPS32R5 | ISA_MIPS_R6)
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#define CPU_MIPS64R6 (CPU_MIPS64R5 | CPU_MIPS32R6)
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#define CPU_LOONGSON3A (CPU_MIPS64R2 | INSN_LOONGSON3A | ASE_LMMI | ASE_LEXT)
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/*
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* Strictly follow the architecture standard:
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* - Disallow "special" instruction handling for PMON/SPIM.
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