target/microblaze: Add use-non-secure property

This property is used to control the security of the following interfaces
on MicroBlaze:
M_AXI_DP - data interface
M_AXI_IP - instruction interface
M_AXI_DC - dcache interface
M_AXI_IC - icache interface

It works by enabling or disabling the use of the non_secure[3:0] signals.

Interfaces and their corresponding values are taken from:
https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug984-vivado-microblaze-ref.pdf
page 153.

Signed-off-by: Joe Komlodi <komlodi@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-Id: <1611274735-303873-2-git-send-email-komlodi@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
This commit is contained in:
Joe Komlodi 2021-01-21 16:18:53 -08:00 committed by Edgar E. Iglesias
parent 9cd69f1a27
commit ea2ccb6561
2 changed files with 57 additions and 0 deletions

View file

@ -233,6 +233,12 @@ typedef struct CPUMBState CPUMBState;
#define TARGET_INSN_START_EXTRA_WORDS 1
/* use-non-secure property masks */
#define USE_NON_SECURE_M_AXI_DP_MASK 0x1
#define USE_NON_SECURE_M_AXI_IP_MASK 0x2
#define USE_NON_SECURE_M_AXI_DC_MASK 0x4
#define USE_NON_SECURE_M_AXI_IC_MASK 0x8
struct CPUMBState {
uint32_t bvalue; /* TCG temporary, only valid during a TB */
uint32_t btarget; /* Full resolved branch destination */
@ -316,6 +322,7 @@ typedef struct {
bool use_msr_instr;
bool use_pcmp_instr;
bool use_mmu;
uint8_t use_non_secure;
bool dcache_writeback;
bool endi;
bool dopb_bus_exception;
@ -337,6 +344,10 @@ struct MicroBlazeCPU {
CPUState parent_obj;
/*< public >*/
bool ns_axi_dp;
bool ns_axi_ip;
bool ns_axi_dc;
bool ns_axi_ic;
CPUNegativeOffsetState neg;
CPUMBState env;