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target/microblaze: Add use-non-secure property
This property is used to control the security of the following interfaces on MicroBlaze: M_AXI_DP - data interface M_AXI_IP - instruction interface M_AXI_DC - dcache interface M_AXI_IC - icache interface It works by enabling or disabling the use of the non_secure[3:0] signals. Interfaces and their corresponding values are taken from: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug984-vivado-microblaze-ref.pdf page 153. Signed-off-by: Joe Komlodi <komlodi@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-Id: <1611274735-303873-2-git-send-email-komlodi@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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2 changed files with 57 additions and 0 deletions
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@ -233,6 +233,12 @@ typedef struct CPUMBState CPUMBState;
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#define TARGET_INSN_START_EXTRA_WORDS 1
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/* use-non-secure property masks */
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#define USE_NON_SECURE_M_AXI_DP_MASK 0x1
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#define USE_NON_SECURE_M_AXI_IP_MASK 0x2
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#define USE_NON_SECURE_M_AXI_DC_MASK 0x4
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#define USE_NON_SECURE_M_AXI_IC_MASK 0x8
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struct CPUMBState {
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uint32_t bvalue; /* TCG temporary, only valid during a TB */
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uint32_t btarget; /* Full resolved branch destination */
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@ -316,6 +322,7 @@ typedef struct {
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bool use_msr_instr;
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bool use_pcmp_instr;
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bool use_mmu;
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uint8_t use_non_secure;
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bool dcache_writeback;
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bool endi;
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bool dopb_bus_exception;
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@ -337,6 +344,10 @@ struct MicroBlazeCPU {
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CPUState parent_obj;
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/*< public >*/
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bool ns_axi_dp;
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bool ns_axi_ip;
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bool ns_axi_dc;
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bool ns_axi_ic;
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CPUNegativeOffsetState neg;
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CPUMBState env;
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