motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-07 17:53:56 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

tcg: Merge INDEX_op_ld*_{i32,i64}

Browse source 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-01-21 21:47:16 -08:00
parent 0de5c9d1f5
commit e996804d40
6 changed files with 83 additions and 122 deletions
Download patch file Download diff file Expand all files Collapse all files

64
tcg/tcg.c
View file

@ -1184,16 +1184,11 @@ static const TCGOutOp * const all_outop[NB_OPS] = {
OUTOP(INDEX_op_eqv, TCGOutOpBinary, outop_eqv),
OUTOP(INDEX_op_extract, TCGOutOpExtract, outop_extract),
OUTOP(INDEX_op_extract2, TCGOutOpExtract2, outop_extract2),
OUTOP(INDEX_op_ld8u_i32, TCGOutOpLoad, outop_ld8u),
OUTOP(INDEX_op_ld8u_i64, TCGOutOpLoad, outop_ld8u),
OUTOP(INDEX_op_ld8s_i32, TCGOutOpLoad, outop_ld8s),
OUTOP(INDEX_op_ld8s_i64, TCGOutOpLoad, outop_ld8s),
OUTOP(INDEX_op_ld16u_i32, TCGOutOpLoad, outop_ld16u),
OUTOP(INDEX_op_ld16u_i64, TCGOutOpLoad, outop_ld16u),
OUTOP(INDEX_op_ld16s_i32, TCGOutOpLoad, outop_ld16s),
OUTOP(INDEX_op_ld16s_i64, TCGOutOpLoad, outop_ld16s),
OUTOP(INDEX_op_ld_i32, TCGOutOpLoad, outop_ld),
OUTOP(INDEX_op_ld_i64, TCGOutOpLoad, outop_ld),
OUTOP(INDEX_op_ld8u, TCGOutOpLoad, outop_ld8u),
OUTOP(INDEX_op_ld8s, TCGOutOpLoad, outop_ld8s),
OUTOP(INDEX_op_ld16u, TCGOutOpLoad, outop_ld16u),
OUTOP(INDEX_op_ld16s, TCGOutOpLoad, outop_ld16s),
OUTOP(INDEX_op_ld, TCGOutOpLoad, outop_ld),
OUTOP(INDEX_op_movcond, TCGOutOpMovcond, outop_movcond),
OUTOP(INDEX_op_mul, TCGOutOpBinary, outop_mul),
OUTOP(INDEX_op_muls2, TCGOutOpMul2, outop_muls2),
@ -1235,8 +1230,8 @@ static const TCGOutOp * const all_outop[NB_OPS] = {
OUTOP(INDEX_op_extu_i32_i64, TCGOutOpUnary, outop_extu_i32_i64),
OUTOP(INDEX_op_extrl_i64_i32, TCGOutOpUnary, outop_extrl_i64_i32),
OUTOP(INDEX_op_extrh_i64_i32, TCGOutOpUnary, outop_extrh_i64_i32),
OUTOP(INDEX_op_ld32u_i64, TCGOutOpLoad, outop_ld32u),
OUTOP(INDEX_op_ld32s_i64, TCGOutOpLoad, outop_ld32s),
OUTOP(INDEX_op_ld32u, TCGOutOpLoad, outop_ld32u),
OUTOP(INDEX_op_ld32s, TCGOutOpLoad, outop_ld32s),
#endif
};
@ -2443,6 +2438,11 @@ bool tcg_op_supported(TCGOpcode op, TCGType type, unsigned flags)
case INDEX_op_brcond:
case INDEX_op_deposit:
case INDEX_op_extract:
case INDEX_op_ld8u:
case INDEX_op_ld8s:
case INDEX_op_ld16u:
case INDEX_op_ld16s:
case INDEX_op_ld:
case INDEX_op_mov:
case INDEX_op_movcond:
case INDEX_op_negsetcond:
@ -2452,11 +2452,6 @@ bool tcg_op_supported(TCGOpcode op, TCGType type, unsigned flags)
case INDEX_op_xor:
return has_type;
case INDEX_op_ld8u_i32:
case INDEX_op_ld8s_i32:
case INDEX_op_ld16u_i32:
case INDEX_op_ld16s_i32:
case INDEX_op_ld_i32:
case INDEX_op_st8_i32:
case INDEX_op_st16_i32:
case INDEX_op_st_i32:
@ -2466,13 +2461,8 @@ bool tcg_op_supported(TCGOpcode op, TCGType type, unsigned flags)
case INDEX_op_setcond2_i32:
return TCG_TARGET_REG_BITS == 32;
case INDEX_op_ld8u_i64:
case INDEX_op_ld8s_i64:
case INDEX_op_ld16u_i64:
case INDEX_op_ld16s_i64:
case INDEX_op_ld32u_i64:
case INDEX_op_ld32s_i64:
case INDEX_op_ld_i64:
case INDEX_op_ld32u:
case INDEX_op_ld32s:
case INDEX_op_st8_i64:
case INDEX_op_st16_i64:
case INDEX_op_st32_i64:
@ -4428,10 +4418,7 @@ liveness_pass_2(TCGContext *s)
arg_ts = arg_temp(op->args[i]);
dir_ts = arg_ts->state_ptr;
if (dir_ts && arg_ts->state == TS_DEAD) {
TCGOpcode lopc = (arg_ts->type == TCG_TYPE_I32
? INDEX_op_ld_i32
: INDEX_op_ld_i64);
TCGOp *lop = tcg_op_insert_before(s, op, lopc,
TCGOp *lop = tcg_op_insert_before(s, op, INDEX_op_ld,
arg_ts->type, 3);
lop->args[0] = temp_arg(dir_ts);
@ -5763,20 +5750,13 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
}
break;
case INDEX_op_ld32u_i64:
case INDEX_op_ld32s_i64:
tcg_debug_assert(type == TCG_TYPE_I64);
/* fall through */
case INDEX_op_ld8u_i32:
case INDEX_op_ld8u_i64:
case INDEX_op_ld8s_i32:
case INDEX_op_ld8s_i64:
case INDEX_op_ld16u_i32:
case INDEX_op_ld16u_i64:
case INDEX_op_ld16s_i32:
case INDEX_op_ld16s_i64:
case INDEX_op_ld_i32:
case INDEX_op_ld_i64:
case INDEX_op_ld8u:
case INDEX_op_ld8s:
case INDEX_op_ld16u:
case INDEX_op_ld16s:
case INDEX_op_ld32u:
case INDEX_op_ld32s:
case INDEX_op_ld:
{
const TCGOutOpLoad *out =
container_of(all_outop[op->opc], TCGOutOpLoad, base);