mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-08 10:13:56 -06:00
Spelling fixes, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2927 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
6d9db39cd9
commit
e91c8a7783
11 changed files with 16 additions and 15 deletions
|
@ -2784,7 +2784,7 @@ static void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
|||
case 0x09:
|
||||
case 0x0c:
|
||||
case 0x0d:
|
||||
case 0x12: /* veritcal display end */
|
||||
case 0x12: /* vertical display end */
|
||||
s->cr[s->cr_index] = val;
|
||||
break;
|
||||
|
||||
|
|
|
@ -445,9 +445,9 @@ static void cuda_update(CUDAState *s)
|
|||
cuda_update_irq(s);
|
||||
} else {
|
||||
if (!(s->last_b & TIP)) {
|
||||
/* handle end of host to cuda transfert */
|
||||
/* handle end of host to cuda transfer */
|
||||
packet_received = (s->data_out_index > 0);
|
||||
/* always an IRQ at the end of transfert */
|
||||
/* always an IRQ at the end of transfer */
|
||||
s->ifr |= SR_INT;
|
||||
cuda_update_irq(s);
|
||||
}
|
||||
|
|
|
@ -325,7 +325,7 @@ static void ne2000_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
|||
s->cmd = val;
|
||||
if (!(val & E8390_STOP)) { /* START bit makes no sense on RTL8029... */
|
||||
s->isr &= ~ENISR_RESET;
|
||||
/* test specific case: zero length transfert */
|
||||
/* test specific case: zero length transfer */
|
||||
if ((val & (E8390_RREAD | E8390_RWRITE)) &&
|
||||
s->rcnt == 0) {
|
||||
s->isr |= ENISR_RDC;
|
||||
|
@ -340,7 +340,7 @@ static void ne2000_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
|||
if (index + s->tcnt <= NE2000_PMEM_END) {
|
||||
qemu_send_packet(s->vc, s->mem + index, s->tcnt);
|
||||
}
|
||||
/* signal end of transfert */
|
||||
/* signal end of transfer */
|
||||
s->tsr = ENTSR_PTX;
|
||||
s->isr |= ENISR_TX;
|
||||
s->cmd &= ~E8390_TRANS;
|
||||
|
@ -550,7 +550,7 @@ static inline void ne2000_dma_update(NE2000State *s, int len)
|
|||
|
||||
if (s->rcnt <= len) {
|
||||
s->rcnt = 0;
|
||||
/* signal end of transfert */
|
||||
/* signal end of transfer */
|
||||
s->isr |= ENISR_RDC;
|
||||
ne2000_update_irq(s);
|
||||
} else {
|
||||
|
|
|
@ -489,7 +489,7 @@ int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun)
|
|||
is_write = 1;
|
||||
break;
|
||||
case 0x35:
|
||||
DPRINTF("Syncronise cache (sector %d, count %d)\n", lba, len);
|
||||
DPRINTF("Synchronise cache (sector %d, count %d)\n", lba, len);
|
||||
bdrv_flush(s->bdrv);
|
||||
break;
|
||||
case 0x43:
|
||||
|
|
2
hw/vga.c
2
hw/vga.c
|
@ -346,7 +346,7 @@ static void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
|
|||
case 0x09:
|
||||
case 0x0c:
|
||||
case 0x0d:
|
||||
case 0x12: /* veritcal display end */
|
||||
case 0x12: /* vertical display end */
|
||||
s->cr[s->cr_index] = val;
|
||||
break;
|
||||
default:
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue