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target/arm: Split out vfp_expand_imm

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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180110063337.21538-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2018-01-16 13:28:13 +00:00 • committed by Peter Maydell
parent ecd219f7ab
commit e90a99fe6b
1 changed files with 28 additions and 16 deletions
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44
target/arm/translate-a64.c
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@ -4985,6 +4985,33 @@ static void disas_fp_3src(DisasContext *s, uint32_t insn)
} }
} }
/* The imm8 encodes the sign bit, enough bits to represent an exponent in
* the range 01....1xx to 10....0xx, and the most significant 4 bits of
* the mantissa; see VFPExpandImm() in the v8 ARM ARM.
*/
static uint64_t vfp_expand_imm(int size, uint8_t imm8)
{
uint64_t imm;
switch (size) {
case MO_64:
imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
(extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) |
extract32(imm8, 0, 6);
imm <<= 48;
break;
case MO_32:
imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
(extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) |
(extract32(imm8, 0, 6) << 3);
imm <<= 16;
break;
default:
g_assert_not_reached();
}
return imm;
}
/* Floating point immediate /* Floating point immediate
* 31 30 29 28 24 23 22 21 20 13 12 10 9 5 4 0 * 31 30 29 28 24 23 22 21 20 13 12 10 9 5 4 0
* +---+---+---+-----------+------+---+------------+-------+------+------+ * +---+---+---+-----------+------+---+------------+-------+------+------+
@ -5008,22 +5035,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t insn)
return; return;
} }
/* The imm8 encodes the sign bit, enough bits to represent imm = vfp_expand_imm(MO_32 + is_double, imm8);
* an exponent in the range 01....1xx to 10....0xx,
* and the most significant 4 bits of the mantissa; see
* VFPExpandImm() in the v8 ARM ARM.
*/
if (is_double) {
imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
(extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) |
extract32(imm8, 0, 6);
imm <<= 48;
} else {
imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
(extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) |
(extract32(imm8, 0, 6) << 3);
imm <<= 16;
}
tcg_res = tcg_const_i64(imm); tcg_res = tcg_const_i64(imm);
write_fp_dreg(s, rd, tcg_res); write_fp_dreg(s, rd, tcg_res);