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target-xtensa: add basic checks to icache opcodes

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Check privilege level for privileged instructions (IHU, III, IIU and IPFL
are privileged), memory accessibility for instructions that reference memory
(IH* and IPFL) and windowed register validity for all instruction cache
instructions.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2014-02-07 15:57:22 +04:00
parent 7c84259019
commit e848dd4248
3 changed files with 33 additions and 0 deletions
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5
target-xtensa/op_helper.c
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@ -415,6 +415,11 @@ void HELPER(check_interrupts)(CPUXtensaState *env)
check_interrupts(env);
}
void HELPER(itlb_hit_test)(CPUXtensaState *env, uint32_t vaddr)
{
get_page_addr_code(env, vaddr);
}
/*!
* Check vaddr accessibility/cache attributes and raise an exception if
* specified by the ATOMCTL SR.