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target/arm: Add aa64_va_parameters_both

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We will want to check TBI for I and D simultaneously.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20190108223129.5570-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-01-21 10:23:13 +00:00 • committed by Peter Maydell
parent bf0be43387
commit e737ed2ad8
2 changed files with 20 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

10
target/arm/helper.c
View file

@ -9744,8 +9744,8 @@ static uint8_t convert_stage2_attrs(CPUARMState *env, uint8_t s2attrs)
return (hiattr << 6) | (hihint << 4) | (loattr << 2) | lohint; return (hiattr << 6) | (hihint << 4) | (loattr << 2) | lohint;
} }
ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, ARMVAParameters aa64_va_parameters_both(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data) ARMMMUIdx mmu_idx)
{ {
uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr; uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr;
uint32_t el = regime_el(env, mmu_idx); uint32_t el = regime_el(env, mmu_idx);
@ -9800,6 +9800,12 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
}; };
} }
ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data)
{
return aa64_va_parameters_both(env, va, mmu_idx);
}
static ARMVAParameters aa32_va_parameters(CPUARMState *env, uint32_t va, static ARMVAParameters aa32_va_parameters(CPUARMState *env, uint32_t va,
ARMMMUIdx mmu_idx) ARMMMUIdx mmu_idx)
{ {

15
target/arm/internals.h
View file

@ -957,9 +957,9 @@ typedef struct ARMVAParameters {
} ARMVAParameters; } ARMVAParameters;
#ifdef CONFIG_USER_ONLY #ifdef CONFIG_USER_ONLY
static inline ARMVAParameters aa64_va_parameters(CPUARMState *env, static inline ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va, uint64_t va,
ARMMMUIdx mmu_idx, bool data) ARMMMUIdx mmu_idx)
{ {
return (ARMVAParameters) { return (ARMVAParameters) {
/* 48-bit address space */ /* 48-bit address space */
@ -968,7 +968,16 @@ static inline ARMVAParameters aa64_va_parameters(CPUARMState *env,
.tbi = false, .tbi = false,
}; };
} }
static inline ARMVAParameters aa64_va_parameters(CPUARMState *env,
uint64_t va,
ARMMMUIdx mmu_idx, bool data)
{
return aa64_va_parameters_both(env, va, mmu_idx);
}
#else #else
ARMVAParameters aa64_va_parameters_both(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx);
ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va, ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data); ARMMMUIdx mmu_idx, bool data);
#endif #endif